GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

southbridge/nvidia/mcp55: Get rid of #include early_smbus.c 

Using linker instead of '#include *.c'.

Change-Id: I74dfa99c8bb3f4ca7ef3d774be2197897022f52c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18484
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2017-02-24 14:37:57 +01:00 committed by Martin Roth
parent ad017c63d2
commit 11cf68c710
16 changed files with 36 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/asus/m2n-e/romstage.c
View File

@ -26,7 +26,7 @@
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <lib.h> #include <lib.h>

2
src/mainboard/gigabyte/m57sli/romstage.c
View File

@ -26,7 +26,7 @@
#include <console/console.h> #include <console/console.h>
#include <spd.h> #include <spd.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>

2
src/mainboard/msi/ms7260/romstage.c
View File

@ -26,7 +26,7 @@
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <lib.h> #include <lib.h>

2
src/mainboard/msi/ms9282/romstage.c
View File

@ -27,7 +27,7 @@
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>

2
src/mainboard/msi/ms9652_fam10/romstage.c
View File

@ -41,7 +41,7 @@
#include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <cpu/amd/family_10h-family_15h/init_cpus.h>
#include <arch/early_variables.h> #include <arch/early_variables.h>
#include <cbmem.h> #include <cbmem.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include "southbridge/nvidia/mcp55/early_ctrl.c" #include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c" #include "resourcemap.c"

2
src/mainboard/nvidia/l1_2pvv/romstage.c
View File

@ -27,7 +27,7 @@
#include <lib.h> #include <lib.h>
#include <spd.h> #include <spd.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>

2
src/mainboard/sunw/ultra40m2/romstage.c
View File

@ -27,7 +27,7 @@
#include <lib.h> #include <lib.h>
#include <spd.h> #include <spd.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>

2
src/mainboard/supermicro/h8dme/romstage.c
View File

@ -24,7 +24,7 @@
#include <lib.h> #include <lib.h>
#include <spd.h> #include <spd.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN #include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>

2
src/mainboard/supermicro/h8dmr/romstage.c
View File

@ -27,7 +27,7 @@
#include <lib.h> #include <lib.h>
#include <spd.h> #include <spd.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN #include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>

2
src/mainboard/supermicro/h8dmr_fam10/romstage.c
View File

@ -42,7 +42,7 @@
#include <arch/early_variables.h> #include <arch/early_variables.h>
#include <cbmem.h> #include <cbmem.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN #include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
#include "southbridge/nvidia/mcp55/early_ctrl.c" #include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c" #include "resourcemap.c"

2
src/mainboard/supermicro/h8qme_fam10/romstage.c
View File

@ -41,7 +41,7 @@
#include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <cpu/amd/family_10h-family_15h/init_cpus.h>
#include <arch/early_variables.h> #include <arch/early_variables.h>
#include <cbmem.h> #include <cbmem.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN #include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
#include "southbridge/nvidia/mcp55/early_ctrl.c" #include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c" #include "resourcemap.c"

2
src/mainboard/tyan/s2912/romstage.c
View File

@ -27,7 +27,7 @@
#include <lib.h> #include <lib.h>
#include <spd.h> #include <spd.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include <northbridge/amd/amdk8/raminit.h> #include <northbridge/amd/amdk8/raminit.h>
#include <delay.h> #include <delay.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>

2
src/mainboard/tyan/s2912_fam10/romstage.c
View File

@ -41,7 +41,7 @@
#include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <cpu/amd/family_10h-family_15h/init_cpus.h>
#include <arch/early_variables.h> #include <arch/early_variables.h>
#include <cbmem.h> #include <cbmem.h>
#include "southbridge/nvidia/mcp55/early_smbus.c" #include <southbridge/nvidia/mcp55/mcp55.h>
#include "southbridge/nvidia/mcp55/early_ctrl.c" #include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c" #include "resourcemap.c"

1
src/southbridge/nvidia/mcp55/Makefile.inc
View File

@ -19,6 +19,7 @@ ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c
ifeq ($(CONFIG_MCP55_USE_AZA),y) ifeq ($(CONFIG_MCP55_USE_AZA),y)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c

21
src/southbridge/nvidia/mcp55/early_smbus.c
View File

@ -17,13 +17,16 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <arch/io.h>
#include <console/console.h>
#include "smbus.h" #include "smbus.h"
#include "mcp55.h"
#define SMBUS0_IO_BASE 0x1000 #define SMBUS0_IO_BASE 0x1000
#define SMBUS1_IO_BASE (0x1000 + (1 << 8)) #define SMBUS1_IO_BASE (0x1000 + (1 << 8))
/* Size: 0x40 */ /* Size: 0x40 */
static void enable_smbus(void) void enable_smbus(void)
{ {
pci_devfn_t dev; pci_devfn_t dev;
dev = pci_locate_device(PCI_ID(0x10de, 0x0368), 0); dev = pci_locate_device(PCI_ID(0x10de, 0x0368), 0);
@ -43,47 +46,47 @@ static void enable_smbus(void)
outb(inb(SMBUS1_IO_BASE + SMBHSTSTAT), SMBUS1_IO_BASE + SMBHSTSTAT); outb(inb(SMBUS1_IO_BASE + SMBHSTSTAT), SMBUS1_IO_BASE + SMBHSTSTAT);
} }
static inline int smbus_recv_byte(unsigned device) int smbus_recv_byte(unsigned device)
{ {
return do_smbus_recv_byte(SMBUS0_IO_BASE, device); return do_smbus_recv_byte(SMBUS0_IO_BASE, device);
} }
static inline int smbus_send_byte(unsigned device, unsigned char val) int smbus_send_byte(unsigned device, unsigned char val)
{ {
return do_smbus_send_byte(SMBUS0_IO_BASE, device, val); return do_smbus_send_byte(SMBUS0_IO_BASE, device, val);
} }
static inline int smbus_read_byte(unsigned device, unsigned address) int smbus_read_byte(unsigned device, unsigned address)
{ {
return do_smbus_read_byte(SMBUS0_IO_BASE, device, address); return do_smbus_read_byte(SMBUS0_IO_BASE, device, address);
} }
static inline int smbus_write_byte(unsigned device, unsigned address, int smbus_write_byte(unsigned device, unsigned address,
unsigned char val) unsigned char val)
{ {
return do_smbus_write_byte(SMBUS0_IO_BASE, device, address, val); return do_smbus_write_byte(SMBUS0_IO_BASE, device, address, val);
} }
static inline int smbusx_recv_byte(unsigned smb_index, unsigned device) int smbusx_recv_byte(unsigned smb_index, unsigned device)
{ {
return do_smbus_recv_byte(SMBUS0_IO_BASE + (smb_index << 8), device); return do_smbus_recv_byte(SMBUS0_IO_BASE + (smb_index << 8), device);
} }
static inline int smbusx_send_byte(unsigned smb_index, unsigned device, int smbusx_send_byte(unsigned smb_index, unsigned device,
unsigned char val) unsigned char val)
{ {
return do_smbus_send_byte(SMBUS0_IO_BASE + (smb_index << 8), return do_smbus_send_byte(SMBUS0_IO_BASE + (smb_index << 8),
device, val); device, val);
} }
static inline int smbusx_read_byte(unsigned smb_index, unsigned device, int smbusx_read_byte(unsigned smb_index, unsigned device,
unsigned address) unsigned address)
{ {
return do_smbus_read_byte(SMBUS0_IO_BASE + (smb_index << 8), return do_smbus_read_byte(SMBUS0_IO_BASE + (smb_index << 8),
device, address); device, address);
} }
static inline int smbusx_write_byte(unsigned smb_index, unsigned device, int smbusx_write_byte(unsigned smb_index, unsigned device,
unsigned address, unsigned char val) unsigned address, unsigned char val)
{ {
return do_smbus_write_byte(SMBUS0_IO_BASE + (smb_index << 8), return do_smbus_write_byte(SMBUS0_IO_BASE + (smb_index << 8),

10
src/southbridge/nvidia/mcp55/mcp55.h
View File

@ -30,6 +30,16 @@ void mcp55_enable(device_t dev);
extern struct pci_operations mcp55_pci_ops; extern struct pci_operations mcp55_pci_ops;
#else #else
void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
void enable_smbus(void);
int smbus_recv_byte(unsigned device);
int smbus_send_byte(unsigned device, unsigned char val);
int smbus_read_byte(unsigned device, unsigned address);
int smbus_write_byte(unsigned device, unsigned address, unsigned char val);
int smbusx_recv_byte(unsigned smb_index, unsigned device);
int smbusx_send_byte(unsigned smb_index, unsigned device, unsigned char val);
int smbusx_read_byte(unsigned smb_index, unsigned device, unsigned address);
int smbusx_write_byte(unsigned smb_index, unsigned device, unsigned address,
unsigned char val);
#endif #endif
#endif #endif