mb/google/brya/var/{gimble, gimble4es}: Use ACPI _PLD macro
This patch uses ACPI _PLD macros for USB Type A and C ports. BUG=b:216490477 TEST=emerge-brya coreboot Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I0274f03926d97fc543b98f3fb961580283202806 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61825 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -265,24 +265,14 @@ chip soc/intel/alderlake
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(1, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_LEFT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(2, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
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device ref tcss_usb3_port3 on end
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end
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end
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@ -295,24 +285,14 @@ chip soc/intel/alderlake
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(1, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_LEFT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(2, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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@ -325,12 +305,7 @@ chip soc/intel/alderlake
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register "desc" = ""USB2 Type-A Port (MLB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
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.group = ACPI_PLD_GROUP(3, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb2_port8 on end
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end
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chip drivers/usb/acpi
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@ -344,12 +319,7 @@ chip soc/intel/alderlake
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register "desc" = ""USB3 Type-A Port (MLB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
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.group = ACPI_PLD_GROUP(3, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb3_port2 on end
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end
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end
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@ -233,24 +233,14 @@ chip soc/intel/alderlake
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(1, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_LEFT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(2, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
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device ref tcss_usb3_port3 on end
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end
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end
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@ -263,24 +253,14 @@ chip soc/intel/alderlake
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(1, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_LEFT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_OVAL,
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.group = ACPI_PLD_GROUP(2, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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@ -293,12 +273,7 @@ chip soc/intel/alderlake
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register "desc" = ""USB2 Type-A Port (MLB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
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.group = ACPI_PLD_GROUP(3, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb2_port8 on end
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end
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chip drivers/usb/acpi
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@ -312,12 +287,7 @@ chip soc/intel/alderlake
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register "desc" = ""USB3 Type-A Port (MLB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "{
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.visible = true,
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.panel = PLD_PANEL_RIGHT,
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.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
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.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
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.group = ACPI_PLD_GROUP(3, 1)}"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb3_port2 on end
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end
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end
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