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soc/intel/broadwell/pch/sata.c: Don't enable Bus Master 

Bus Master is not required and reference code does not set it.

Change-Id: I2f70486f96cf3dcaba74283293b93b9747cd0300
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47026
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
This commit is contained in:
Angel Pons 2020-10-30 14:18:40 +01:00 committed by Patrick Georgi
parent 3fa23b8c00
commit 11fdb17564
1 changed files with 2 additions and 3 deletions
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5
src/soc/intel/broadwell/pch/sata.c
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@ -35,9 +35,8 @@ static void sata_init(struct device *dev)
printk(BIOS_DEBUG, "SATA: Initializing controller in AHCI mode.\n");
/* Enable BARs */
pci_write_config16(dev, PCI_COMMAND,
PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
/* Enable memory space decoding for ABAR */
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
/* Set Interrupt Line */
/* Interrupt Pin is set by D31IP.PIP */