nb/intel/sandybridge: Align TOUUD down to 1 MiB granularity

This register has a 1MiB granularity. The lowest bit is a lock bit.

Change-Id: I688cb7818fc849784026ca0bc6acb7ef1ae92133
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66256
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/intel/sandybridge/northbridge.c

@@ -85,7 +85,7 @@ static uint64_t get_touud(const struct device *dev)
 {
 	uint64_t touud = pci_read_config32(dev, TOUUD + 4);
 	touud <<= 32;
-	touud |= pci_read_config32(dev, TOUUD);
+	touud |= pci_read_config32(dev, TOUUD) & 0xfff00000;
 	return touud;
 }