diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 4184233484..67739a4532 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -93,12 +93,6 @@ struct soc_intel_skylake_config {
 	/* Whether to ignore VT-d support of the SKU */
 	int ignore_vtd;
 
-	/*
-	 * DDR Frequency Limit
-	 * 0(Auto), 1067, 1333, 1600, 1867, 2133, 2400
-	 */
-	u16 DdrFreqLimit;
-
 	/* Probeless Trace function */
 	u8 ProbelessTrace;
 
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index a7ce2f8de5..79fb46425d 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -221,7 +221,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 	m_cfg->UserBd = BOARD_TYPE_ULT_ULX;
 	m_cfg->RMT = config->Rmt;
 	m_cfg->CmdTriStateDis = config->CmdTriStateDis;
-	m_cfg->DdrFreqLimit = config->DdrFreqLimit;
+	m_cfg->DdrFreqLimit = 0;
 	m_cfg->VmxEnable = CONFIG(ENABLE_VMX);
 	m_cfg->PrmrrSize = get_valid_prmrr_size();
 	for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) {