grunt: Change Bayhub eMMC base clock to 200MHz
The clock was previously set to 52MHz to workaround the fact that depthcharge didn't support tuning. Tuning has now been enabled in depthcharge: https://chromium-review.googlesource.com/c/chromiumos/platform/depthcharge/+/1655553 BUG=b:122244718 TEST=Verified on grunt that it speeds up boot by 130ms Change-Id: If847cea2a7848bcd175958db86e652d4f710201a Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33430 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -61,12 +61,22 @@ void board_bh720(struct device *dev)
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write32((void *)(sdbar + BH720_MEM_RW_ADR),
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BH720_MEM_RW_WRITE | BH720_PCR_EMMC_SETTING);
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/* Set Bayhub SD base CLK 50MHz: case#1 PCR 0x3E4[22] = 0 */
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/* Set Base clock to 200MHz(PCR 0x304[31:16] = 0x2510) */
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write32((void *)(sdbar + BH720_MEM_RW_ADR),
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BH720_MEM_RW_READ | BH720_PCR_DrvStrength_PLL);
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bh720_pcr_data = read32((void *)(sdbar + BH720_MEM_RW_DATA));
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bh720_pcr_data &= 0x0000FFFF;
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bh720_pcr_data |= 0x2510 << 16;
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write32((void *)(sdbar + BH720_MEM_RW_DATA), bh720_pcr_data);
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write32((void *)(sdbar + BH720_MEM_RW_ADR),
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BH720_MEM_RW_WRITE | BH720_PCR_DrvStrength_PLL);
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/* Use PLL Base clock PCR 0x3E4[22] = 1 */
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write32((void *)(sdbar + BH720_MEM_RW_ADR),
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BH720_MEM_RW_READ | BH720_PCR_CSR);
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bh720_pcr_data = read32((void *)(sdbar + BH720_MEM_RW_DATA));
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write32((void *)(sdbar + BH720_MEM_RW_DATA),
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bh720_pcr_data & ~BH720_PCR_CSR_EMMC_MODE_SEL);
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bh720_pcr_data | BH720_PCR_CSR_EMMC_MODE_SEL);
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write32((void *)(sdbar + BH720_MEM_RW_ADR),
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BH720_MEM_RW_WRITE | BH720_PCR_CSR);
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