mediatek/mt8183: Add SAMSUNG 4GB LPDDR4X discrete DDR support
BUG=b:80501386 BRANCH=none TEST=Boots correctly and stress test passes on Kukui. Change-Id: I27164f0909edb9d9398835e292fb845f0e342391 Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34532 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Huayang Duan <huayang.duan@mediatek.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -26,6 +26,7 @@ static const char *const sdram_configs[] = {
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[5] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
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[5] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
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[6] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
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[6] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
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[7] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
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[7] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
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[8] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
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};
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};
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static struct sdram_params params;
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static struct sdram_params params;
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@ -1,4 +1,5 @@
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sdram-params :=
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sdram-params :=
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sdram-params += sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB
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sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB
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sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB
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sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB
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sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB
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sdram-params += sdram-lpddr4x-KMDH6001DA-B422-4GB
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sdram-params += sdram-lpddr4x-KMDH6001DA-B422-4GB
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@ -0,0 +1,41 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/emi.h>
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struct sdram_params params = {
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.impedance = {
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[ODT_OFF] = {0x9, 0x7, 0x0, 0xF},
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[ODT_ON] = {0xB, 0x9, 0x0, 0xE}
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},
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.wr_level = {
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[CHANNEL_A] = { {0x22, 0x1C}, {0x23, 0x1D} },
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[CHANNEL_B] = { {0x26, 0x23}, {0x26, 0x23} }
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},
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.cbt_cs = {
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[CHANNEL_A] = {0x6, 0x5},
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[CHANNEL_B] = {0x6, 0x6}
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},
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.cbt_mr12 = {
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[CHANNEL_A] = {0x56, 0x58},
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[CHANNEL_B] = {0x58, 0x56}
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},
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.emi_cona_val = 0xF053F154,
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.emi_conh_val = 0x44440003,
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.emi_conf_val = 0x00421000,
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.chn_emi_cona_val = {0x0444F051, 0x0444F051},
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.cbt_mode_extern = CBT_NORMAL_MODE,
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.delay_cell_unit = 868,
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};
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