mainboard/asus/kfsn4-dre_k8/romstage.c: Use tabs for indents
Change-Id: If6b36ebef49dd2733d272f990bb7c6623d4ab1b1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16785 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -299,11 +299,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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printk(BIOS_DEBUG, "ck804_early_setup_x()\n");
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needs_reset |= ck804_early_setup_x();
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/* FIDVID change will issue one LDTSTOP and the HT change will be effective too */
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if (needs_reset) {
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printk(BIOS_INFO, "ht reset -\n");
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soft_reset();
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}
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/* FIDVID change will issue one LDTSTOP and the HT change will be effective too */
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if (needs_reset) {
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printk(BIOS_INFO, "ht reset -\n");
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soft_reset();
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}
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post_code(0x3b);
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@ -323,8 +323,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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* IS_ENABLED(CONFIG_DEBUG_SMBUS) uncomment this block
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*/
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if (IS_ENABLED(CONFIG_DEBUG_SMBUS)) {
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dump_spd_registers(&cpu[0]);
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dump_smbus_registers();
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dump_spd_registers(&cpu[0]);
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dump_smbus_registers();
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}
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#endif
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@ -348,8 +348,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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/* Initialize GPIO */
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/* Access SuperIO GPI03 logical device */
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uint16_t port = GPIO3_DEV >> 8;
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outb(0x87, port);
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outb(0x87, port);
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outb(0x87, port);
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outb(0x87, port);
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pnp_set_logical_device(GPIO3_DEV);
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/* Set GP37 (power LED) to output */
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pnp_write_config(GPIO3_DEV, 0xf0, 0x7f);
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