arm/exynos: Allow releasing UART retention for resume.

The UART / serial console is put in retention state by kernel during suspend /
resume path, which caused Coreboot not able to print any messages during resume.

Sending values to the padret_uart_opt inside PMU may release UART, but that may
also cause unexpected output when kernel is back. However, it's still very
helpful when we are debugging suspend/resume inside Coreboot.

To get UART message on resume, call wakeup_enable_uart() in boot block or
romstage (before console_init).

Change-Id: Ib5759cb402c6e018d9dba14fad8b61f6a1b1a265
Reviewed-on: https://chromium-review.googlesource.com/170440
Tested-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit 547fbbfe2eeb6da4e161f36be2caf8099f9eac9b)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6649
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/cpu/samsung/exynos5250/power.c

@@ -83,3 +83,8 @@ void power_enable_xclkout(void)
 	clrsetbits_le32(&exynos_power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
 				PMU_DEBUG_XXTI);
 }
+
+void power_release_uart_retention(void)
+{
+	writel(1 << 28, &exynos_power->padret_uart_opt);
+}

src/cpu/samsung/exynos5250/power.h

@@ -59,7 +59,9 @@ struct exynos5_power {
 	uint32_t	inform1;		/* 0x0804 */
 	uint8_t		reserved6[0x1f8];
 	uint32_t	pmu_debug;		/* 0x0A00*/
-	uint8_t         reserved7[0x2908];
+	uint8_t         reserved7[0x2728];
+        uint32_t        padret_uart_opt;        /* 0x3128 */
+        uint8_t         reserved8[0x1e0];
 	uint32_t	ps_hold_ctrl;		/* 0x330c */
 } __attribute__ ((__packed__));
 
@@ -90,4 +92,8 @@ void power_exit_wakeup(void);
 /* pmu debug is used for xclkout, enable xclkout with source as XXTI */
 void power_enable_xclkout(void);
 
+/* Release UART retention on resume (only for debugging, may conflict with
+ * kernel). */
+void power_release_uart_retention(void);
+
 #endif

src/cpu/samsung/exynos5250/wakeup.c

@@ -48,3 +48,8 @@ int get_wakeup_state(void)
 
 	return IS_NOT_WAKEUP;
 }
+
+void wakeup_enable_uart(void)
+{
+	power_release_uart_retention();
+}

src/cpu/samsung/exynos5250/wakeup.h

@@ -38,5 +38,6 @@ enum {
 int wakeup_need_reset(void);
 int get_wakeup_state(void);
 void wakeup(void);
+void wakeup_enable_uart(void);
 
 #endif	/* CPU_SAMSUNG_EXYNOS5250_WAKEUP_H */

src/cpu/samsung/exynos5420/power.c

@@ -85,3 +85,8 @@ void power_enable_xclkout(void)
 	clrsetbits_le32(&exynos_power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
 			PMU_DEBUG_XXTI);
 }
+
+void power_release_uart_retention(void)
+{
+	writel(1 << 28, &exynos_power->padret_uart_opt);
+}

src/cpu/samsung/exynos5420/power.h

@@ -70,9 +70,11 @@ struct exynos5_power {
 	} arm_core[4];
 	uint8_t		reserved9[0xe04];
 	uint32_t	padret_dram_status;	/* 0x3004 */
-	uint8_t         reservedA[0x1e0];
+	uint8_t         reservedA[0xe0];
+	uint32_t        padret_uart_opt;        /* 0x30e8 */
+	uint8_t         reservedB[0xfc];
 	uint32_t	padret_dram_cblk_opt;	/* 0x31e8 */
-	uint8_t         reservedB[0x120];
+	uint8_t         reservedC[0x120];
 	uint32_t	ps_hold_ctrl;		/* 0x330c */
 } __attribute__ ((__packed__));
 
@@ -103,4 +105,8 @@ void power_exit_wakeup(void);
 /* pmu debug is used for xclkout, enable xclkout with source as XXTI */
 void power_enable_xclkout(void);
 
+/* Release UART retention on resume (only for debugging, may conflict with
+ * kernel). */
+void power_release_uart_retention(void);
+
 #endif

src/cpu/samsung/exynos5420/wakeup.c

@@ -51,3 +51,8 @@ int get_wakeup_state(void)
 
 	return IS_NOT_WAKEUP;
 }
+
+void wakeup_enable_uart(void)
+{
+	power_release_uart_retention();
+}

src/cpu/samsung/exynos5420/wakeup.h

@@ -38,5 +38,6 @@ enum {
 int wakeup_need_reset(void);
 int get_wakeup_state(void);
 void wakeup(void);
+void wakeup_enable_uart(void);
 
 #endif	/* CPU_SAMSUNG_EXYNOS5420_WAKEUP_H */