VIA cpus: apply un-written naming rules

Rename files and directories:
  model_c3 -> c3
  model_c7 -> c7

Change-Id: If144fc501e8ae44b347ac44fa90c689c33a8e126
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/614
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2012-02-09 16:51:38 +02:00 committed by Stefan Reinauer
parent c466287d4d
commit 12b72624ee
18 changed files with 31 additions and 26 deletions

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@ -1,2 +1,2 @@
source src/cpu/via/model_c3/Kconfig source src/cpu/via/c3/Kconfig
source src/cpu/via/model_c7/Kconfig source src/cpu/via/c7/Kconfig

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@ -1,3 +1,3 @@
subdirs-$(CONFIG_CPU_VIA_C7) += model_c7 subdirs-$(CONFIG_CPU_VIA_C7) += c7
subdirs-$(CONFIG_CPU_VIA_C3) += model_c3 subdirs-$(CONFIG_CPU_VIA_C3) += c3

11
src/cpu/via/c3/Kconfig Normal file
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@ -0,0 +1,11 @@
config CPU_VIA_C3
bool
if CPU_VIA_C3
config CPU_SPECIFIC_OPTIONS
def_bool y
select UDELAY_TSC
select MMX
endif # CPU_VIA_C3

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@ -5,4 +5,4 @@ subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm subdirs-y += ../../x86/smm
subdirs-y += ../../intel/microcode subdirs-y += ../../intel/microcode
driver-y += model_c3_init.c driver-y += c3_init.c

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@ -26,7 +26,7 @@
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h> #include <cpu/x86/cache.h>
static void model_c3_init(device_t dev) static void c3_init(device_t dev)
{ {
x86_enable_cache(); x86_enable_cache();
x86_setup_mtrrs(); x86_setup_mtrrs();
@ -37,7 +37,7 @@ static void model_c3_init(device_t dev)
}; };
static struct device_operations cpu_dev_ops = { static struct device_operations cpu_dev_ops = {
.init = model_c3_init, .init = c3_init,
}; };
static struct cpu_device_id cpu_table[] = { static struct cpu_device_id cpu_table[] = {

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@ -3,7 +3,7 @@ config CPU_VIA_C7
if CPU_VIA_C7 if CPU_VIA_C7
config CPU_SPECFIC_OPTIONS config CPU_SPECIFIC_OPTIONS
def_bool y def_bool y
select UDELAY_TSC select UDELAY_TSC
select MMX select MMX
@ -13,11 +13,9 @@ config CPU_SPECFIC_OPTIONS
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
hex hex
default 0xffef0000 default 0xffef0000
depends on CPU_VIA_C7
config DCACHE_RAM_SIZE config DCACHE_RAM_SIZE
hex hex
default 0x8000 default 0x8000
depends on CPU_VIA_C7
endif # CPU_VIA_C7 endif # CPU_VIA_C7

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@ -5,6 +5,6 @@ subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm subdirs-y += ../../x86/smm
subdirs-y += ../../intel/microcode subdirs-y += ../../intel/microcode
driver-y += model_c7_init.c driver-y += c7_init.c
cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc

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@ -147,7 +147,7 @@ static void set_c7_speed(int model) {
printk(BIOS_INFO, "Current CPU multiplier: %dx\n", (int)((msr.lo >> 8) & 0xff)); printk(BIOS_INFO, "Current CPU multiplier: %dx\n", (int)((msr.lo >> 8) & 0xff));
} }
static void model_c7_init(device_t dev) static void c7_init(device_t dev)
{ {
u8 brand; u8 brand;
struct cpuinfo_x86 c; struct cpuinfo_x86 c;
@ -210,7 +210,7 @@ static void model_c7_init(device_t dev)
}; };
static struct device_operations cpu_dev_ops = { static struct device_operations cpu_dev_ops = {
.init = model_c7_init, .init = c7_init,
}; };
/* Look in arch/x86/lib/cpu.c:cpu_initialize. If there is no CPU with an exact /* Look in arch/x86/lib/cpu.c:cpu_initialize. If there is no CPU with an exact

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@ -1,4 +0,0 @@
config CPU_VIA_C3
bool
select UDELAY_TSC
select MMX

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@ -57,7 +57,7 @@ chip northbridge/via/cn700 # Northbridge
end end
end end
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # APIC cluster
chip cpu/via/model_c7 # VIA C7 chip cpu/via/c7 # VIA C7
device lapic 0 on end # APIC device lapic 0 on end # APIC
end end
end end

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@ -55,7 +55,7 @@ chip northbridge/via/cn700 # Northbridge
end end
end end
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # APIC cluster
chip cpu/via/model_c7 # VIA C7 chip cpu/via/c7 # VIA C7
device lapic 0 on end # APIC device lapic 0 on end # APIC
end end
end end

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@ -54,7 +54,7 @@ chip northbridge/via/cn700 # Northbridge
end end
end end
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # APIC cluster
chip cpu/via/model_c7 # VIA C7 chip cpu/via/c7 # VIA C7
device lapic 0 on end # APIC device lapic 0 on end # APIC
end end
end end

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@ -1,7 +1,7 @@
chip northbridge/via/vt8623 chip northbridge/via/vt8623
device lapic_cluster 0 on device lapic_cluster 0 on
chip cpu/via/model_c3 chip cpu/via/c3
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -17,7 +17,7 @@ chip northbridge/via/vx800 # Northbridge
# end # end
end end
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # APIC cluster
chip cpu/via/model_c7 # VIA C7 chip cpu/via/c7 # VIA C7
device lapic 0 on end # APIC device lapic 0 on end # APIC
end end
end end

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@ -22,7 +22,7 @@
chip northbridge/via/cn400 # Northbridge chip northbridge/via/cn400 # Northbridge
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # APIC cluster
chip cpu/via/model_c3 # VIA C3 chip cpu/via/c3 # VIA C3
device lapic 0 on end # APIC device lapic 0 on end # APIC
end end
end end

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@ -54,7 +54,7 @@ chip northbridge/via/vt8601
end end
device lapic_cluster 0 on device lapic_cluster 0 on
chip cpu/via/model_c3 chip cpu/via/c3
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -82,7 +82,7 @@ chip northbridge/via/cn700 # Northbridge
end end
end end
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # APIC cluster
chip cpu/via/model_c7 # VIA C7 chip cpu/via/c7 # VIA C7
device lapic 0 on end # APIC device lapic 0 on end # APIC
end end
end end

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@ -1,6 +1,6 @@
chip northbridge/via/cx700 chip northbridge/via/cx700
device lapic_cluster 0 on device lapic_cluster 0 on
chip cpu/via/model_c7 chip cpu/via/c7
device lapic 0 on end device lapic 0 on end
end end
end end