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mb/google/brya/var/banshee: Replace amp max98357 with max98360 

Based on the latest schematic, replace amp max98357 with max98360.

BUG=b:224692387, b:216110896
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: Id265a4276c3f8b5553a0e5d7ed824b1d9a520d44
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62887
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frank Wu 2022-03-17 13:37:11 +08:00 committed by Felix Held
parent d402fdff5d
commit 12cc10fe8b
2 changed files with 17 additions and 14 deletions
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29
src/mainboard/google/brya/variants/banshee/gpio.c
View File

@ -229,26 +229,29 @@ static const struct pad_config override_gpio_table[] = {
/* R1 : HDA_SYNC ==> I2S_HP_SFRM_R */
/* R2 : HDA_SDO ==> I2S_PCH_TX_HP_RX_STRAP */
/* R3 : HDA_SDIO ==> I2S_PCH_RX_HP_TX */
/* R4 : HDA_RST# ==> I2S_SPKR_SCLK_R */
/* R5 : HDA_SDI1 ==> I2S_SPKR_SFRM_R */
/* R6 : I2S2_TXD ==> I2S_PCH_TX_SPKR_RX_R */
/* R4 : HDA_RST# ==> NC */
PAD_NC(GPP_R4, NONE),
/* R5 : HDA_SDI1 ==> NC */
PAD_NC(GPP_R5, NONE),
/* R6 : I2S2_TXD ==> NC */
PAD_NC(GPP_R6, NONE),
/* R7 : I2S2_RXD ==> NC */
PAD_NC(GPP_R7, NONE),
/* S0 : SNDW0_CLK ==> NC */
PAD_NC(GPP_S0, NONE),
/* S1 : SNDW0_DATA ==> NC */
PAD_NC(GPP_S1, NONE),
/* S2 : SNDW1_CLK ==> DMIC_CLK0_R */
/* S3 : SNDW1_DATA ==> DMIC_DATA0_R */
/* S0 : SNDW0_CLK ==> I2S_SPKR_SCLK_R */
PAD_CFG_NF(GPP_S0, NONE, DEEP, NF4),
/* S1 : SNDW0_DATA ==> I2S_SPKR_SFRM_R */
PAD_CFG_NF(GPP_S1, NONE, DEEP, NF4),
/* S2 : SNDW1_CLK ==> I2S_PCH_TX_SPKR_RX_R */
PAD_CFG_NF(GPP_S2, NONE, DEEP, NF4),
/* S3 : SNDW1_DATA ==> NC */
PAD_NC(GPP_S3, NONE),
/* S4 : SNDW2_CLK ==> NC */
PAD_NC(GPP_S4, NONE),
/* S5 : SNDW2_DATA ==> NC */
PAD_NC(GPP_S5, NONE),
/* S6 : SNDW3_CLK ==> NC */
PAD_NC(GPP_S6, NONE),
/* S7 : SNDW3_DATA ==> NC */
PAD_NC(GPP_S7, NONE),
/* S6 : SNDW3_CLK ==> DMIC_CLK0_R */
/* S7 : SNDW3_DATA ==> DMIC_DATA0_R */
};
/* Early pad configuration in bootblock */

2
src/mainboard/google/brya/variants/banshee/overridetree.cb
View File

@ -217,7 +217,7 @@ chip soc/intel/alderlake
end
device ref hda on
chip drivers/generic/max98357a
register "hid" = ""MX98357A""
register "hid" = ""MX98360A""
register "sdmode_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
register "sdmode_delay" = "5"