src: Rename EM100Pro-specific SPI console Kconfig option
To avoid confusion with `flashconsole` (CONSOLE_SPI_FLASH), prefix this option with `EM100Pro`. Looks like it is not build-tested, however. Change-Id: I4868fa52250fbbf43e328dfd12e0e48fc58c4234 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45973 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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@ -889,7 +889,7 @@ config DEBUG_SMI
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bool "Output verbose SMI debug messages"
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bool "Output verbose SMI debug messages"
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default n
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default n
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depends on HAVE_SMI_HANDLER
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depends on HAVE_SMI_HANDLER
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select SPI_FLASH_SMM if SPI_CONSOLE || CONSOLE_SPI_FLASH
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select SPI_FLASH_SMM if EM100PRO_SPI_CONSOLE || CONSOLE_SPI_FLASH
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help
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help
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This option enables additional SMI related debug messages.
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This option enables additional SMI related debug messages.
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@ -294,9 +294,9 @@ config CONSOLE_QEMU_DEBUGCON_PORT
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depends on CONSOLE_QEMU_DEBUGCON
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depends on CONSOLE_QEMU_DEBUGCON
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default 0x402
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default 0x402
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config SPI_CONSOLE
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config EM100PRO_SPI_CONSOLE
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bool "SPI debug console output"
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bool "EM100Pro SPI debug console output"
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depends on HAVE_SPI_CONSOLE_SUPPORT && !DEBUG_SPI_FLASH
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depends on HAVE_EM100PRO_SPI_CONSOLE_SUPPORT && !DEBUG_SPI_FLASH
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help
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help
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Enable support for the debug console on the Dediprog EM100Pro.
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Enable support for the debug console on the Dediprog EM100Pro.
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This is currently working only in ramstage due to how the spi
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This is currently working only in ramstage due to how the spi
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@ -164,5 +164,5 @@ config SPI_FLASH_HAS_VOLATILE_GROUP
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endif # SPI_FLASH
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endif # SPI_FLASH
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config HAVE_SPI_CONSOLE_SUPPORT
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config HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
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def_bool n
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def_bool n
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@ -2,7 +2,7 @@
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subdirs-y += tpm
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subdirs-y += tpm
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ifeq ($(CONFIG_SPI_CONSOLE),y)
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ifeq ($(CONFIG_EM100PRO_SPI_CONSOLE),y)
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ramstage-y += spiconsole.c
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ramstage-y += spiconsole.c
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smm-y += spiconsole.c
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smm-y += spiconsole.c
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endif
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endif
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@ -8,7 +8,7 @@
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void spiconsole_init(void);
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void spiconsole_init(void);
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void spiconsole_tx_byte(unsigned char c);
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void spiconsole_tx_byte(unsigned char c);
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#define __CONSOLE_SPI_ENABLE__ (CONFIG(SPI_CONSOLE) && \
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#define __CONSOLE_SPI_ENABLE__ (CONFIG(EM100PRO_SPI_CONSOLE) && \
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(ENV_RAMSTAGE || (ENV_SMM && CONFIG(DEBUG_SMI))))
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(ENV_RAMSTAGE || (ENV_SMM && CONFIG(DEBUG_SMI))))
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#if __CONSOLE_SPI_ENABLE__
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#if __CONSOLE_SPI_ENABLE__
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@ -30,7 +30,7 @@ config CPU_SPECIFIC_OPTIONS
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select UDELAY_TSC
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select UDELAY_TSC
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select SOC_INTEL_COMMON
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select SOC_INTEL_COMMON
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select HAVE_SPI_CONSOLE_SUPPORT
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select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
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select INTEL_GMA_ACPI
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select INTEL_GMA_ACPI
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select INTEL_GMA_SWSMISCI
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select INTEL_GMA_SWSMISCI
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON
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@ -34,7 +34,7 @@ config CPU_SPECIFIC_OPTIONS
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select UDELAY_TSC
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select UDELAY_TSC
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select USE_GENERIC_FSP_CAR_INC
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select USE_GENERIC_FSP_CAR_INC
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select HAVE_SPI_CONSOLE_SUPPORT
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select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
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select HAVE_FSP_GOP
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select HAVE_FSP_GOP
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select GENERIC_GPIO_LIB
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select GENERIC_GPIO_LIB
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select INTEL_GMA_ACPI
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select INTEL_GMA_ACPI
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@ -37,7 +37,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
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select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
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select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
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select HAVE_SPI_CONSOLE_SUPPORT
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select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
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select INTEL_GMA_ACPI
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select INTEL_GMA_ACPI
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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@ -41,7 +41,7 @@ const struct reg_script system_agent_finalize_script[] = {
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};
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};
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const struct reg_script pch_finalize_script[] = {
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const struct reg_script pch_finalize_script[] = {
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#if !CONFIG(SPI_CONSOLE)
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#if !CONFIG(EM100PRO_SPI_CONSOLE)
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/* Lock SPIBAR */
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/* Lock SPIBAR */
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REG_MMIO_OR32(RCBA_BASE_ADDRESS + SPIBAR_OFFSET + SPIBAR_HSFS,
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REG_MMIO_OR32(RCBA_BASE_ADDRESS + SPIBAR_OFFSET + SPIBAR_HSFS,
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SPIBAR_HSFS_FLOCKDN),
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SPIBAR_HSFS_FLOCKDN),
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@ -24,7 +24,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
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select PCIEXP_ASPM
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select PCIEXP_ASPM
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select PCIEXP_COMMON_CLOCK
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select PCIEXP_COMMON_CLOCK
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select HAVE_SPI_CONSOLE_SUPPORT
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select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
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select RTC
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select RTC
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select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP
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select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP
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select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
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select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
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