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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -26,19 +26,20 @@ static void pnp_exit_ext_func_mode(device_t dev)
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outb(0xaa, dev->path.u.pnp.port);
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}
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static void pnp_write_hwm(unsigned long port_base, uint8_t reg, uint8_t value)
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static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
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{
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outb(reg, port_base+5);
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outb(value, port_base+6);
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outb(reg, port_base);
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outb(value, port_base + 1);
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}
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static uint8_t pnp_read_hwm(unsigned long port_base, uint8_t reg)
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static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
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{
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outb(reg, port_base + 5);
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return inb(port_base + 6);
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outb(reg, port_base);
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return inb(port_base + 1);
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}
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static void enable_hwm_smbus(device_t dev) {
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/* set the pin 91,92 as I2C bus */
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uint8_t reg, value;
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reg = 0x2b;
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value = pnp_read_config(dev, reg);
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@ -80,29 +81,27 @@ static void init_hwm(unsigned long base)
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int i;
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unsigned hwm_reg_values[] = {
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// reg mask data
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0x40 , 0xff , 0x81, // ; Start Hardware Monitoring for WIN627
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0x48 , 0xaa , 0x2a, // ; Program SIO SMBus BAR to 54h>>1
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// 0x48 , 0xc8 , 0x48, // ; Program SIO SMBus BAR to 90h>>1
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0x4A , 0x21 , 0x21, // ; Program T2 SMBus BAR to 92h>>1 &
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// ; Program T3 SMBus BAR to 94h>>1
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0x4E , 0x80 , 0x00,
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0x43 , 0x00 , 0xFF,
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0x44 , 0x00 , 0x3F,
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0x4C , 0xBF , 0x18,
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0x4D , 0xFF , 0x80 // ; Turn Off Beep
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/* reg mask data */
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0x40, 0xff, 0x81, /* start HWM */
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0x48, 0xaa, 0x2a, /* set SMBus base to 0x54>>1 */
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0x4a, 0x21, 0x21, /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */
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0x4e, 0x80, 0x00,
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0x43, 0x00, 0xff,
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0x44, 0x00, 0x3f,
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0x4c, 0xbf, 0x18,
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0x4d, 0xff, 0x80 /* turn off beep */
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};
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for(i = 0; i< sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i+=3 ) {
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reg = hwm_reg_values[i];
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value = pnp_read_hwm(base, reg);
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value = pnp_read_index(base, reg);
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value &= 0xff & hwm_reg_values[i+1];
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value |= 0xff & hwm_reg_values[i+2];
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#if 0
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printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base,reg,value);
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printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value);
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#endif
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pnp_write_hwm(base,reg, value);
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pnp_write_index(base, reg, value);
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}
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}
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@ -131,7 +130,8 @@ static void w83627hf_init(device_t dev)
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break;
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case W83627HF_HWM:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_hwm(res0->base);
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#define HWM_INDEX_PORT 5
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init_hwm(res0->base + HWM_INDEX_PORT);
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break;
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}
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@ -160,7 +160,6 @@ void w83627hf_pnp_enable_resources(device_t dev)
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switch(dev->path.u.pnp.device) {
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case W83627HF_HWM:
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//set the pin 91,92 as I2C bus
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printk_debug("w83627hf hwm smbus enabled\r\n");
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enable_hwm_smbus(dev);
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break;
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