sandybridge: Pass chip info to i915lightup.
Change-Id: I280441aadb0575dc0b99584cdcd48cc76a0289a2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5284 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -35,6 +35,7 @@
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#include "onboard.h"
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#include "ec.h"
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <northbridge/intel/sandybridge/gma.h>
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#include <smbios.h>
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#include <device/pci.h>
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#include <ec/google/chromeec/ec.h>
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@ -235,11 +236,8 @@ static int run(int index)
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return i+1;
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}
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int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio,
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unsigned int gfx);
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int i915lightup(unsigned int pphysbase, unsigned int piobase,
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unsigned int pmmio, unsigned int pgfx)
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int i915lightup(const struct northbridge_intel_sandybridge_config *info,
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u32 pphysbase, u16 piobase, u32 pmmio, u32 pgfx)
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{
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static struct edid edid;
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int edid_ok;
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@ -644,13 +644,13 @@ static void gma_func0_init(struct device *dev)
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/* This should probably run before post VBIOS init. */
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printk(BIOS_SPEW, "Initializing VGA without OPROM.\n");
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u32 iobase, mmiobase, physbase, graphics_base;
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struct northbridge_intel_sandybridge_config *conf = dev->chip_info;
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iobase = dev->resource_list[2].base;
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mmiobase = dev->resource_list[0].base;
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physbase = pci_read_config32(dev, 0x5c) & ~0xf;
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graphics_base = dev->resource_list[1].base;
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int i915lightup(u32 physbase, u32 iobase, u32 mmiobase, u32 gfx);
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int lightup_ok = i915lightup(physbase, iobase, mmiobase, graphics_base);
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int lightup_ok = i915lightup(conf, physbase, iobase, mmiobase, graphics_base);
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if (lightup_ok)
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gfx_set_init_done(1);
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#endif
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@ -166,3 +166,8 @@ typedef struct {
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#define VBT_SIGNATURE 0x54425624
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struct northbridge_intel_sandybridge_config;
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int i915lightup(const struct northbridge_intel_sandybridge_config *info,
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u32 physbase, u16 pio, u32 mmio, u32 lfb);
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