sandybridge: Pass chip info to i915lightup.

Change-Id: I280441aadb0575dc0b99584cdcd48cc76a0289a2
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5284
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Vladimir Serbinenko 2014-02-23 00:09:48 +01:00
parent fd2501b3f1
commit 12fcb86bba
3 changed files with 10 additions and 7 deletions

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@ -35,6 +35,7 @@
#include "onboard.h"
#include "ec.h"
#include <southbridge/intel/bd82x6x/pch.h>
#include <northbridge/intel/sandybridge/gma.h>
#include <smbios.h>
#include <device/pci.h>
#include <ec/google/chromeec/ec.h>
@ -235,11 +236,8 @@ static int run(int index)
return i+1;
}
int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio,
unsigned int gfx);
int i915lightup(unsigned int pphysbase, unsigned int piobase,
unsigned int pmmio, unsigned int pgfx)
int i915lightup(const struct northbridge_intel_sandybridge_config *info,
u32 pphysbase, u16 piobase, u32 pmmio, u32 pgfx)
{
static struct edid edid;
int edid_ok;

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@ -644,13 +644,13 @@ static void gma_func0_init(struct device *dev)
/* This should probably run before post VBIOS init. */
printk(BIOS_SPEW, "Initializing VGA without OPROM.\n");
u32 iobase, mmiobase, physbase, graphics_base;
struct northbridge_intel_sandybridge_config *conf = dev->chip_info;
iobase = dev->resource_list[2].base;
mmiobase = dev->resource_list[0].base;
physbase = pci_read_config32(dev, 0x5c) & ~0xf;
graphics_base = dev->resource_list[1].base;
int i915lightup(u32 physbase, u32 iobase, u32 mmiobase, u32 gfx);
int lightup_ok = i915lightup(physbase, iobase, mmiobase, graphics_base);
int lightup_ok = i915lightup(conf, physbase, iobase, mmiobase, graphics_base);
if (lightup_ok)
gfx_set_init_done(1);
#endif

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@ -166,3 +166,8 @@ typedef struct {
#define VBT_SIGNATURE 0x54425624
struct northbridge_intel_sandybridge_config;
int i915lightup(const struct northbridge_intel_sandybridge_config *info,
u32 physbase, u16 pio, u32 mmio, u32 lfb);