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hp/pavilion_m6_1035dx: Simplify agesawrapper_amdinitcpuio() 

TRIVIAL. Rather than using the AGESA functions for PCI and MSR access,
use the coreboot variants, which are cleaner and more readable.

Change-Id: I4f24820606900e16f0d159df019f4560f1592489
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5468
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Alexandru Gagniuc 2014-04-06 17:10:31 -05:00
parent a0f9ece19c
commit 12fd779176
2 changed files with 26 additions and 36 deletions
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60
src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
View File

@ -26,9 +26,12 @@
#include "BiosCallOuts.h" #include "BiosCallOuts.h"
#include "PlatformGnbPcieComplex.h" #include "PlatformGnbPcieComplex.h"
#define __SIMPLE_DEVICE__
#include <arch/acpi.h> #include <arch/acpi.h>
#include <arch/io.h> #include <arch/io.h>
#include <cbmem.h> #include <cbmem.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <device/device.h> #include <device/device.h>
#include <string.h> #include <string.h>
@ -79,53 +82,40 @@ VOID *AcpiIvrs = NULL;
* L O C A L F U N C T I O N S * L O C A L F U N C T I O N S
*--------------------------------------------------------------------------------------- *---------------------------------------------------------------------------------------
*/ */
UINT32 uint32_t agesawrapper_amdinitcpuio(void)
agesawrapper_amdinitcpuio (
VOID
)
{ {
AGESA_STATUS Status; pci_devfn_t dev;
UINT64 MsrReg; msr_t msr;
UINT32 PciData; uint32_t reg32;
PCI_ADDR PciAddress;
AMD_CONFIG_PARAMS StdHeader; dev = PCI_DEV(0, 0x18, 1);
/* Enable legacy video routing: D18F1xF4 VGA Enable */ /* Enable legacy video routing: D18F1xF4 VGA Enable */
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xF4); pci_io_write_config32(dev, 0xf4, 1);
PciData = 1;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
/* The platform BIOS needs to ensure the memory ranges of Hudson legacy /* The platform BIOS needs to ensure the memory ranges of Hudson legacy
* devices (TPM, HPET, BIOS RAM, Watchdog Timer, I/O APIC and ACPI) are * devices (TPM, HPET, BIOS RAM, Watchdog Timer, I/O APIC and ACPI) are
* set to non-posted regions. * set to non-posted regions.
* Last address before processor local APIC at FEE00000
*/ */
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x84); pci_io_write_config32(dev, 0x84, 0x00fedf00 | (1 << 7));
PciData = 0x00FEDF00; /* last address before processor local APIC at FEE00000 */
PciData |= 1 << 7; /* set NP (non-posted) bit */
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); /* Lowest NP address is HPET at FED00000 */
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x80); pci_io_write_config32(dev, 0x80, (0xfed00000 >> 8) | 3);
PciData = (0xFED00000 >> 8) | 3; /* lowest NP address is HPET at FED00000 */
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
/* Map the remaining PCI hole as posted MMIO */ /* Map the remaining PCI hole as posted MMIO */
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x8C); pci_io_write_config32(dev, 0x8C, 0x00fecf00);
PciData = 0x00FECF00; /* last address before non-posted range */
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); msr = rdmsr(0xc001001a);
LibAmdMsrRead (0xC001001A, &MsrReg, &StdHeader); reg32 = (msr.hi << 24) | (msr.lo >> 8) | 3; /* Equivalent to msr >> 8 */
MsrReg = (MsrReg >> 8) | 3; pci_io_write_config32(dev, 0x88, reg32);
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x88);
PciData = (UINT32)MsrReg;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
/* Send all IO (0000-FFFF) to southbridge. */ /* Send all IO (0000-FFFF) to southbridge. */
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xC4); pci_io_write_config32(dev, 0xc4, 0x0000f000);
PciData = 0x0000F000; pci_io_write_config32(dev, 0xc0, 0x00000003);
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xC0); return AGESA_SUCCESS;
PciData = 0x00000003;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
Status = AGESA_SUCCESS;
return (UINT32)Status;
} }
UINT32 UINT32

2
src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h
View File

@ -81,7 +81,7 @@ UINT32 agesawrapper_amdinitpost (void);
UINT32 agesawrapper_amdinitmid (void); UINT32 agesawrapper_amdinitmid (void);
UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus);
UINT32 agesawrapper_amdinitmmio (void); UINT32 agesawrapper_amdinitmmio (void);
UINT32 agesawrapper_amdinitcpuio (void); uint32_t agesawrapper_amdinitcpuio (void);
void *agesawrapper_getlateinitptr (int pick); void *agesawrapper_getlateinitptr (int pick);
UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr);
UINT32 agesawrapper_amdS3Save(VOID); UINT32 agesawrapper_amdS3Save(VOID);