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mb/google/hatch/var/kohaku: Skip UART0 config in FSP 

Similar to hatch(CB:32278), this change sets SerialIo
config for UART0 to PchSerialIoSkipInit to skip initialization in
FSP.

This change also adds a device to kohaku override tree to ensure that
the settings in it take effect.

BUG=b:130310626

Change-Id: Ia25b45811be26d55fc0019e4cd22eb7310b5a4c4
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Furquan Shaikh 2019-04-22 23:45:06 -07:00
parent 77fb3632a4
commit 131134288b
1 changed files with 4 additions and 1 deletions
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5
src/mainboard/google/hatch/variants/kohaku/overridetree.cb
View File

@ -10,9 +10,12 @@ chip soc/intel/cannonlake
[PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI0] = PchSerialIoPci,
[PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci,
[PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled,
[PchSerialIoIndexUART0] = PchSerialIoPci, [PchSerialIoIndexUART0] = PchSerialIoSkipInit,
[PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART1] = PchSerialIoDisabled,
[PchSerialIoIndexUART2] = PchSerialIoDisabled, [PchSerialIoIndexUART2] = PchSerialIoDisabled,
}" }"
device domain 0 on
end
end end