mainboard/(i945,ich7): Remove commented RCBA32(0x341c) code
PCIe root port clock gate is already enabled at i945/early_init.c Also fix comments when only PCIe root port is enabled. Change-Id: Ica38529dbdd5cc51b19b426999a1d9f0b678b4f5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37576 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
e86ded841f
commit
13746076e9
|
@ -94,7 +94,7 @@ static u8 msr_get_fsb(void)
|
|||
|
||||
void mainboard_late_rcba_config(void)
|
||||
{
|
||||
/* Enable PCIe Root Port Clock Gate */
|
||||
/* Enable only PCIe Root Port Clock Gate */
|
||||
RCBA32(CG) = 0x00000001;
|
||||
}
|
||||
|
||||
|
|
|
@ -138,9 +138,6 @@ void mainboard_late_rcba_config(void)
|
|||
/* Disable unused devices */
|
||||
RCBA32(FD) |= FD_INTLAN;
|
||||
|
||||
/* Enable PCIe Root Port Clock Gate */
|
||||
// RCBA32(0x341c) = 0x00000001;
|
||||
|
||||
/* This should probably go into the ACPI enable trap */
|
||||
/* Set up I/O Trap #0 for 0xfe00 (SMIC) */
|
||||
RCBA32(0x1e84) = 0x00020001;
|
||||
|
|
|
@ -56,6 +56,6 @@ void bootblock_mainboard_early_init(void)
|
|||
|
||||
void mainboard_late_rcba_config(void)
|
||||
{
|
||||
/* Enable PCIe Root Port Clock Gate */
|
||||
/* Enable only PCIe Root Port Clock Gate */
|
||||
RCBA32(CG) = 0x00000001;
|
||||
}
|
||||
|
|
|
@ -110,7 +110,4 @@ void mainboard_late_rcba_config(void)
|
|||
RCBA16(D29IR) = 0x0237;
|
||||
RCBA16(D28IR) = 0x3201;
|
||||
RCBA16(D27IR) = 0x0146;
|
||||
|
||||
/* Enable PCIe Root Port Clock Gate */
|
||||
// RCBA32(0x341c) = 0x00000001;
|
||||
}
|
||||
|
|
|
@ -32,9 +32,6 @@ void mainboard_late_rcba_config(void)
|
|||
|
||||
/* Disable unused devices */
|
||||
RCBA32(FD) |= FD_INTLAN;
|
||||
|
||||
/* Enable PCIe Root Port Clock Gate */
|
||||
// RCBA32(0x341c) = 0x00000001;
|
||||
}
|
||||
|
||||
void bootblock_mainboard_early_init(void)
|
||||
|
|
|
@ -837,6 +837,7 @@ static void ich7_setup_root_complex_topology(void)
|
|||
|
||||
static void ich7_setup_pci_express(void)
|
||||
{
|
||||
/* Enable PCIe Root Port Clock Gate */
|
||||
RCBA32(CG) |= (1 << 0);
|
||||
|
||||
/* Initialize slot power limit for root ports */
|
||||
|
|
Loading…
Reference in New Issue