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drivers/intel/fsp1_1: Configure UART after memory init 

FSP code will default enable the onboard serial port.
When external serial port is used, this onboard port needs to be
disabled.

Add function mainboard_after_memory_init() function to perform
required actions to re-enabled output to external serial port.

BUG=N/A
TEST=LPC Post card on Intel Cherry Hill

Change-Id: Ibb6c9e4153b3de58791b211c7f4241be3bceae9d
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/28464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Frans Hendriks 2019-04-05 13:42:14 +02:00 committed by Patrick Georgi
parent dd11810367
commit 1385b7dd10
2 changed files with 9 additions and 0 deletions
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2
src/drivers/intel/fsp1_1/include/fsp/romstage.h
View File

@ -3,6 +3,7 @@
* *
* Copyright (C) 2014 Google Inc. * Copyright (C) 2014 Google Inc.
* Copyright (C) 2015-2016 Intel Corporation * Copyright (C) 2015-2016 Intel Corporation
* Copyright (C) 2018 Eltan B.V.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -91,5 +92,6 @@ void soc_pre_ram_init(struct romstage_params *params);
/* Update the SOC specific memory config param for mma. */ /* Update the SOC specific memory config param for mma. */
void soc_update_memory_params_for_mma(MEMORY_INIT_UPD *memory_cfg, void soc_update_memory_params_for_mma(MEMORY_INIT_UPD *memory_cfg,
struct mma_config_param *mma_cfg); struct mma_config_param *mma_cfg);
void mainboard_after_memory_init(void);
#endif /* _COMMON_ROMSTAGE_H_ */ #endif /* _COMMON_ROMSTAGE_H_ */

7
src/drivers/intel/fsp1_1/raminit.c
View File

@ -125,6 +125,7 @@ void raminit(struct romstage_params *params)
timestamp_add_now(TS_FSP_MEMORY_INIT_START); timestamp_add_now(TS_FSP_MEMORY_INIT_START);
post_code(POST_FSP_MEMORY_INIT); post_code(POST_FSP_MEMORY_INIT);
status = fsp_memory_init(&fsp_memory_init_params); status = fsp_memory_init(&fsp_memory_init_params);
mainboard_after_memory_init();
post_code(0x37); post_code(0x37);
timestamp_add_now(TS_FSP_MEMORY_INIT_END); timestamp_add_now(TS_FSP_MEMORY_INIT_END);
@ -322,3 +323,9 @@ __weak void soc_memory_init_params(
{ {
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
} }
/* Initialize the SoC after MemoryInit */
__weak void mainboard_after_memory_init(void)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}