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First round of i82801ax clean-ups (trivial). 

After we splitted up the old i82801xx driver which was supposed to support
multiple generations of ICH* chipsets, some of the generified code
is now obsolete in i82801ax which should only cover ICH/ICH0 and none of
the later ICH* generations.

Hence:
 
 - Drop "struct pci_driver" entries for chipsets other than ICH/ICH0.

 - Drop drivers for hardware that is not present on ICH/ICH0: NIC, SATA, EHCI.

 - Drop PIRQE-PIRQH #defines and code, not available on this chipset.

 - Simplify some parts of the code (more will follow).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2010-09-21 23:53:47 +00:00
parent 8fa90ec274
commit 138cdbb17b
11 changed files with 5 additions and 601 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/southbridge/intel/i82801ax/Makefile.inc
View File

@ -22,12 +22,9 @@ driver-y += i82801ax.o
driver-y += i82801ax_ac97.o
driver-y += i82801ax_ide.o
driver-y += i82801ax_lpc.o
driver-y += i82801ax_nic.o
driver-y += i82801ax_pci.o
driver-y += i82801ax_sata.o
# driver-y += i82801ax_smbus.o
driver-y += i82801ax_usb.o
driver-y += i82801ax_usb_ehci.o
obj-y += i82801ax_reset.o
obj-y += i82801ax_watchdog.o

12
src/southbridge/intel/i82801ax/chip.h
View File

@ -19,17 +19,7 @@
*/
/*
* The i82801ax code currently supports:
* - 82801AA
* - 82801AB
* - 82801BA
* - 82801CA
* - 82801DB
* - 82801DBM
* - 82801EB
* - 82801ER
*
* This code should NOT be used for ICH6 and later versions.
* The i82801ax code supports: 82801AA/82801AB (ICH/ICH0).
*/
#ifndef SOUTHBRIDGE_INTEL_I82801AX_CHIP_H

64
src/southbridge/intel/i82801ax/i82801ax_ac97.c
View File

@ -62,67 +62,3 @@ static const struct pci_driver i82801ab_ac97_modem __pci_driver = {
.device = PCI_DEVICE_ID_INTEL_82801AB_AC97_MODEM,
};
/* 82801BA/BAM (ICH2/ICH2-M) */
static const struct pci_driver i82801ba_ac97_audio __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801BA_AC97_AUDIO,
};
static const struct pci_driver i82801ba_ac97_modem __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801BA_AC97_MODEM,
};
/* 82801CA/CAM (ICH3-S/ICH3-M) */
static const struct pci_driver i82801ca_ac97_audio __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801CA_AC97_AUDIO,
};
static const struct pci_driver i82801ca_ac97_modem __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801CA_AC97_MODEM,
};
/* 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) */
static const struct pci_driver i82801db_ac97_audio __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_AC97_AUDIO,
};
static const struct pci_driver i82801db_ac97_modem __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_AC97_MODEM,
};
/* 82801EB/ER (ICH5/ICH5R) */
static const struct pci_driver i82801eb_ac97_audio __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_AC97_AUDIO,
};
static const struct pci_driver i82801eb_ac97_modem __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_AC97_MODEM,
};
/* 82801FB/FR/FW/FRW/FBM (ICH6/ICH6R/ICH6W/ICH6RW/ICH6-M) */
static const struct pci_driver i82801fb_ac97_audio __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_AC97_AUDIO,
};
static const struct pci_driver i82801fb_ac97_modem __pci_driver = {
.ops = &ac97_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_AC97_MODEM,
};

35
src/southbridge/intel/i82801ax/i82801ax_ide.c
View File

@ -34,7 +34,6 @@ static void ide_init(struct device *dev)
/* Get the chip configuration */
config_t *config = dev->chip_info;
/* TODO: Needs to be tested for compatibility with ICH5(R). */
/* Enable IDE devices so the Linux IDE driver will work. */
uint16_t ideTimingConfig;
@ -84,37 +83,3 @@ static const struct pci_driver i82801ab_ide __pci_driver = {
.device = 0x2421,
};
/* 82801BA */
static const struct pci_driver i82801ba_ide __pci_driver = {
.ops = &ide_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x244b,
};
/* 82801CA */
static const struct pci_driver i82801ca_ide __pci_driver = {
.ops = &ide_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x248b,
};
/* 82801DB */
static const struct pci_driver i82801db_ide __pci_driver = {
.ops = &ide_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24cb,
};
/* 82801DBM */
static const struct pci_driver i82801dbm_ide __pci_driver = {
.ops = &ide_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24ca,
};
/* 82801EB & 82801ER */
static const struct pci_driver i82801ex_ide __pci_driver = {
.ops = &ide_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24db,
};

86
src/southbridge/intel/i82801ax/i82801ax_lpc.c
View File

@ -21,8 +21,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* From 82801DBM, needs to be fixed to support everything the 82801ER does. */
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -63,10 +61,6 @@ typedef struct southbridge_intel_i82801ax_config config_t;
#define PIRQB 0x04
#define PIRQC 0x05
#define PIRQD 0x06
#define PIRQE 0x07
#define PIRQF 0x09
#define PIRQG 0x0A
#define PIRQH 0x0B
/*
* Use 0x0ef8 for a bitmap to cover all these IRQ's.
@ -146,34 +140,6 @@ static void i82801ax_pirq_init(device_t dev, uint16_t ich_model)
} else {
pci_write_config8(dev, PIRQD_ROUT, PIRQD);
}
/* Route PIRQE - PIRQH (for ICH2-ICH9). */
if (ich_model >= 0x2440) {
if (config->pirqe_routing) {
pci_write_config8(dev, PIRQE_ROUT, config->pirqe_routing);
} else {
pci_write_config8(dev, PIRQE_ROUT, PIRQE);
}
if (config->pirqf_routing) {
pci_write_config8(dev, PIRQF_ROUT, config->pirqf_routing);
} else {
pci_write_config8(dev, PIRQF_ROUT, PIRQF);
}
if (config->pirqg_routing) {
pci_write_config8(dev, PIRQG_ROUT, config->pirqg_routing);
} else {
pci_write_config8(dev, PIRQG_ROUT, PIRQG);
}
if (config->pirqh_routing) {
pci_write_config8(dev, PIRQH_ROUT, config->pirqh_routing);
} else {
pci_write_config8(dev, PIRQH_ROUT, PIRQH);
}
}
}
static void i82801ax_power_options(device_t dev)
@ -208,16 +174,8 @@ static void i82801ax_power_options(device_t dev)
static void gpio_init(device_t dev, uint16_t ich_model)
{
/* Set the value for GPIO base address register and enable GPIO.
* Note: ICH-ICH5 registers differ from ICH6-ICH9.
*/
if (ich_model <= 0x24D0) {
pci_write_config32(dev, GPIO_BASE_ICH0_5, (GPIO_BASE_ADDR | 1));
pci_write_config8(dev, GPIO_CNTL_ICH0_5, 0x10);
} else if (ich_model >= 0x2640) {
pci_write_config32(dev, GPIO_BASE_ICH6_9, (GPIO_BASE_ADDR | 1));
pci_write_config8(dev, GPIO_CNTL_ICH6_9, 0x10);
}
pci_write_config32(dev, GPIO_BASE_ICH0_5, (GPIO_BASE_ADDR | 1));
pci_write_config8(dev, GPIO_CNTL_ICH0_5, 0x10);
}
static void i82801ax_rtc_init(struct device *dev)
@ -261,15 +219,9 @@ static void i82801ax_lpc_decode_en(device_t dev, uint16_t ich_model)
* LPT decode defaults to 0x378-0x37F and 0x778-0x77F.
* Floppy decode defaults to 0x3F0-0x3F5, 0x3F7.
* We also need to set the value for LPC I/F Enables Register.
* Note: ICH-ICH5 registers differ from ICH6-ICH9.
*/
if (ich_model <= 0x24D0) {
pci_write_config8(dev, COM_DEC, 0x10);
pci_write_config16(dev, LPC_EN_ICH0_5, 0x300F);
} else if (ich_model >= 0x2640) {
pci_write_config8(dev, LPC_IO_DEC, 0x10);
pci_write_config16(dev, LPC_EN_ICH6_9, 0x300F);
}
pci_write_config8(dev, COM_DEC, 0x10);
pci_write_config16(dev, LPC_EN_ICH0_5, 0x300F);
}
static void lpc_init(struct device *dev)
@ -353,33 +305,3 @@ static const struct pci_driver i82801ab_lpc __pci_driver = {
.device = 0x2420,
};
static const struct pci_driver i82801ba_lpc __pci_driver = {
.ops = &lpc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x2440,
};
static const struct pci_driver i82801ca_lpc __pci_driver = {
.ops = &lpc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x2480,
};
static const struct pci_driver i82801db_lpc __pci_driver = {
.ops = &lpc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24c0,
};
static const struct pci_driver i82801dbm_lpc __pci_driver = {
.ops = &lpc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24cc,
};
/* 82801EB and 82801ER */
static const struct pci_driver i82801ex_lpc __pci_driver = {
.ops = &lpc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24d0,
};

78
src/southbridge/intel/i82801ax/i82801ax_nic.c
View File

@ -1,78 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Corey Osgood <corey.osgood@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* This code should work for all ICH* southbridges with a NIC. */
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
static struct device_operations nic_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = 0,
};
/* Note: There's no NIC on 82801AA/AB (ICH/ICH0). */
/* 82801BA/BAM/CA/CAM (ICH2/ICH2-M/ICH3-S/ICH3-M) */
static const struct pci_driver i82801ba_nic __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801BA_LAN,
};
/* 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) */
static const struct pci_driver i82801db_nic __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_LAN,
};
/* 82801EB/ER (ICH5/ICH5R) */
static const struct pci_driver i82801eb_nic __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_LAN,
};
/* 82801FB/FR/FW/FRW/FBM (ICH6/ICH6R/ICH6W/ICH6RW/ICH6-M) */
static const struct pci_driver i82801fb_nic __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_LAN,
};
/* 82801E (C-ICH) */
static const struct pci_driver i82801e_nic1 __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801E_LAN1,
};
static const struct pci_driver i82801e_nic2 __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801E_LAN2,
};

12
src/southbridge/intel/i82801ax/i82801ax_pci.c
View File

@ -58,15 +58,3 @@ static const struct pci_driver i82801ab_pci __pci_driver = {
.device = 0x2428,
};
/* 82801BA, 82801CA, 82801DB, 82801EB, and 82801ER */
static const struct pci_driver i82801misc_pci __pci_driver = {
.ops = &pci_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x244e,
};
static const struct pci_driver i82801dbm_pci __pci_driver = {
.ops = &pci_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x2448,
};

82
src/southbridge/intel/i82801ax/i82801ax_sata.c
View File

@ -1,82 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2005 Tyan Computer
* (Written by Yinghai Lu <yinghailu@gmail.com> for Tyan Computer)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include "i82801ax.h"
/* TODO: Set dynamically, if the user only wants one SATA channel or none
* at all.
*/
static void sata_init(struct device *dev)
{
/* SATA configuration */
pci_write_config8(dev, 0x04, 0x07);
pci_write_config8(dev, 0x09, 0x8f);
/* Set timmings */
pci_write_config16(dev, 0x40, 0x0a307);
pci_write_config16(dev, 0x42, 0x0a307);
/* Sync DMA */
pci_write_config16(dev, 0x48, 0x000f);
pci_write_config16(dev, 0x4a, 0x1111);
/* 66 MHz */
pci_write_config16(dev, 0x54, 0xf00f);
/* Combine IDE - SATA configuration */
pci_write_config8(dev, 0x90, 0x0);
/* Port 0 & 1 enable */
pci_write_config8(dev, 0x92, 0x33);
/* Initialize SATA. */
pci_write_config16(dev, 0xa0, 0x0018);
pci_write_config32(dev, 0xa4, 0x00000264);
pci_write_config16(dev, 0xa0, 0x0040);
pci_write_config32(dev, 0xa4, 0x00220043);
}
static struct device_operations sata_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = sata_init,
.scan_bus = 0,
.enable = i82801ax_enable,
};
/* 82801EB */
static const struct pci_driver i82801eb_sata_driver __pci_driver = {
.ops = &sata_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24d1,
};
/* 82801ER */
static const struct pci_driver i82801er_sata_driver __pci_driver = {
.ops = &sata_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24df,
};

43
src/southbridge/intel/i82801ax/i82801ax_smbus.c
View File

@ -18,8 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* TODO: Check datasheets if this will work for all ICH* southbridges. */
#include <stdint.h>
#include <smbus.h>
#include <pci.h>
@ -66,44 +64,3 @@ static const struct pci_driver i82801ab_smb __pci_driver = {
.device = PCI_DEVICE_ID_INTEL_82801AB_SMB,
};
/* 82801BA/BAM (ICH2/ICH2-M) */
static const struct pci_driver i82801ba_smb __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801BA_SMB,
};
/* 82801CA/CAM (ICH3-S/ICH3-M) */
static const struct pci_driver i82801ca_smb __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801CA_SMB,
};
/* 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) */
static const struct pci_driver i82801db_smb __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_SMB,
};
/* 82801EB/ER (ICH5/ICH5R) */
static const struct pci_driver i82801eb_smb __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_SMB,
};
/* 82801FB/FR/FW/FRW/FBM (ICH6/ICH6R/ICH6W/ICH6RW/ICH6-M) */
static const struct pci_driver i82801fb_smb __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_SMB,
};
/* 82801E (C-ICH) */
static const struct pci_driver i82801e_smb __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801E_SMB,
};

107
src/southbridge/intel/i82801ax/i82801ax_usb.c
View File

@ -54,110 +54,3 @@ static const struct pci_driver i82801ab_usb1 __pci_driver = {
.device = PCI_DEVICE_ID_INTEL_82801AB_USB,
};
/* 82801BA/BAM (ICH2/ICH2-M) */
static const struct pci_driver i82801ba_usb1 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801BA_USB1,
};
static const struct pci_driver i82801ba_usb2 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801BA_USB2,
};
/* 82801CA/CAM (ICH3-S/ICH3-M) */
static const struct pci_driver i82801ca_usb1 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801CA_USB1,
};
static const struct pci_driver i82801ca_usb2 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801CA_USB2,
};
static const struct pci_driver i82801ca_usb3 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801CA_USB3,
};
/* 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) */
static const struct pci_driver i82801db_usb1 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_USB1,
};
static const struct pci_driver i82801db_usb2 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_USB2,
};
static const struct pci_driver i82801db_usb3 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_USB3,
};
/* 82801EB/ER (ICH5/ICH5R) */
static const struct pci_driver i82801eb_usb1 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_USB1,
};
static const struct pci_driver i82801eb_usb2 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_USB2,
};
static const struct pci_driver i82801eb_usb3 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_USB3,
};
static const struct pci_driver i82801eb_usb4 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801EB_USB4,
};
/* 82801FB/FR/FW/FRW/FBM (ICH6/ICH6R/ICH6W/ICH6RW/ICH6-M) */
static const struct pci_driver i82801fb_usb1 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_USB1,
};
static const struct pci_driver i82801fb_usb2 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_USB2,
};
static const struct pci_driver i82801fb_usb3 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_USB3,
};
static const struct pci_driver i82801fb_usb4 __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801FB_USB4,
};
/* 82801E (C-ICH) */
static const struct pci_driver i82801e_usb __pci_driver = {
.ops = &usb_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801E_USB,
};

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src/southbridge/intel/i82801ax/i82801ax_usb_ehci.c
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@ -1,84 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2005 Tyan Computer
* (Written by Yinghai Lu <yinghailu@gmail.com> for Tyan Computer>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include "i82801ax.h"
static void usb_ehci_init(struct device *dev)
{
/* TODO: Is any special init really needed? */
uint32_t cmd;
printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
cmd = pci_read_config32(dev, PCI_COMMAND);
pci_write_config32(dev, PCI_COMMAND, cmd | PCI_COMMAND_MASTER);
printk(BIOS_DEBUG, "done.\n");
}
static void usb_ehci_set_subsystem(device_t dev, unsigned vendor,
unsigned device)
{
uint8_t access_cntl;
access_cntl = pci_read_config8(dev, 0x80);
/* Enable writes to protected registers. */
pci_write_config8(dev, 0x80, access_cntl | 1);
/* Write the subsystem vendor and device ID. */
pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
((device & 0xffff) << 16) | (vendor & 0xffff));
/* Restore protection. */
pci_write_config8(dev, 0x80, access_cntl);
}
static struct pci_operations lops_pci = {
.set_subsystem = &usb_ehci_set_subsystem,
};
static struct device_operations usb_ehci_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = usb_ehci_init,
.scan_bus = 0,
.enable = i82801ax_enable,
.ops_pci = &lops_pci,
};
/* 82801DB and 82801DBM */
static const struct pci_driver i82801db_usb_ehci __pci_driver = {
.ops = &usb_ehci_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24cd,
};
/* 82801EB and 82801ER */
static const struct pci_driver i82801ex_usb_ehci __pci_driver = {
.ops = &usb_ehci_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x24dd,
};