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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2003-12-17 17:25:32 +00:00
parent 17729a2ebd
commit 139ef8aa68
1 changed files with 16 additions and 15 deletions
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31
targets/embeddedplanet/ep405pc/Config.lb
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@ -11,6 +11,7 @@ uses HAVE_OPTION_TABLE
uses CONFIG_COMPRESS uses CONFIG_COMPRESS
uses CONFIG_CHIP_CONFIGURE uses CONFIG_CHIP_CONFIGURE
uses DEFAULT_CONSOLE_LOGLEVEL uses DEFAULT_CONSOLE_LOGLEVEL
uses CONFIG_USE_INIT
uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_SERIAL8250
uses TTYS0_BASE UART0_IO_BASE uses TTYS0_BASE UART0_IO_BASE
uses NO_POST uses NO_POST
@ -18,13 +19,13 @@ uses CONFIG_IDE_STREAM
uses CONFIG_SYS_CLK_FREQ uses CONFIG_SYS_CLK_FREQ
uses IDE_BOOT_DRIVE uses IDE_BOOT_DRIVE
uses IDE_SWAB IDE_OFFSET uses IDE_SWAB IDE_OFFSET
uses ROM_SIZE ROM_IMAGE_SIZE uses ROM_SIZE
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
uses _RESET uses _RESET
uses _EXCEPTION_VECTORS uses _EXCEPTION_VECTORS
uses _ROMBASE uses _ROMBASE
uses _ROMSTART
uses _RAMBASE uses _RAMBASE
uses _RAMSTART
uses EMBEDDED_RAM_SIZE uses EMBEDDED_RAM_SIZE
uses STACK_SIZE HEAP_SIZE uses STACK_SIZE HEAP_SIZE
@ -32,10 +33,13 @@ uses STACK_SIZE HEAP_SIZE
option CPU_OPT="-Wa,-m405" option CPU_OPT="-Wa,-m405"
## use a cross compiler ## use a cross compiler
option CROSS_COMPILE="powerpc-eabi-" #option CROSS_COMPILE="powerpc-eabi-"
## Use stage 1 initialization code
option CONFIG_USE_INIT=1
## Use chip configuration ## Use chip configuration
#option CONFIG_CHIP_CONFIGURE=1 option CONFIG_CHIP_CONFIGURE=1
## We don't use compressed image ## We don't use compressed image
option CONFIG_COMPRESS=0 option CONFIG_COMPRESS=0
@ -72,29 +76,26 @@ option STACK_SIZE=0x10000
## ##
option HEAP_SIZE=0x10000 option HEAP_SIZE=0x10000
## Compute the location and size of where this firmware image
## (linuxBIOS plus bootloader) will live in the boot rom chip.
##
option ROM_SECTION_SIZE=ROM_SIZE
option ROM_SECTION_OFFSET=0
## ##
## System clock ## System clock
## ##
option CONFIG_SYS_CLK_FREQ=33 option CONFIG_SYS_CLK_FREQ=33
romimage "normal" romimage "normal"
##
option _ROMBASE=0xfff00000
## Reset vector address ## Reset vector address
option _RESET=0xfffffffc option _RESET=0xfffffffc
## Exception vectors ## Exception vectors
option _EXCEPTION_VECTORS=0xfff00100 option _EXCEPTION_VECTORS=_ROMBASE+0x100
## linuxBIOS ROM start address ## linuxBIOS ROM start address
option _ROMBASE=0xfff03000 option _ROMSTART=0xfff03000
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. ## linuxBIOS C code runs at this location in RAM
option ROM_IMAGE_SIZE=49152 option _RAMBASE=0x00100000
mainboard embeddedplanet/ep405pc mainboard embeddedplanet/ep405pc
end end