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cpu/intel/common: rework AES-NI locking 

Simplify the AES-NI code by using msr_set and correct the comment.

Change-Id: Ib2cda433bbec0192277839c02a1862b8f41340cb
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Michael Niewöhner 2020-10-11 15:56:21 +02:00 committed by Nico Huber
parent 8b4a9380b5
commit 13b9149bab
3 changed files with 7 additions and 11 deletions
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4
src/cpu/intel/common/common.h
View File

@ -28,8 +28,8 @@ bool intel_ht_supported(void);
bool intel_ht_sibling(void);
/*
* Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling
* as suggested in Intel document 325384-070US.
* Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended changes
* to the enablement state as suggested in Intel document 325384-070US.
*/
void set_aesni_lock(void);

12
src/cpu/intel/common/common_init.c
View File

@ -266,10 +266,6 @@ void cpu_init_cppc_config(struct cppc_config *config, u32 version)
}
}
/*
* Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling
* as suggested in Intel document 325384-070US.
*/
void set_aesni_lock(void)
{
msr_t msr;
@ -279,8 +275,8 @@ void set_aesni_lock(void)
return;
msr = rdmsr(MSR_FEATURE_CONFIG);
if ((msr.lo & 1) == 0) {
msr.lo |= 1;
wrmsr(MSR_FEATURE_CONFIG, msr);
}
if (msr.lo & AESNI_LOCK)
return;
msr_set(MSR_FEATURE_CONFIG, AESNI_LOCK);
}

2
src/include/cpu/intel/msr.h
View File

@ -6,6 +6,6 @@
*/
#define MSR_FEATURE_CONFIG 0x13c
#define AESNI_LOCK_BIT 0
#define AESNI_LOCK (1 << 0)
#endif /* CPU_INTEL_MSR_H */