CPU: Declare cpu_phys_address_size() for all arch

Resource allocator and 64-bit PCI BARs will need it and
PCI use is not really restricted to x86.

Change-Id: Ie97f0f73380118f43ec6271aed5617d62a4f5532
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17733
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/arch/x86/include/arch/cpu.h

@@ -161,7 +161,6 @@ static inline unsigned int cpuid_edx(unsigned int op)
 
 int cpu_cpuid_extended_level(void);
 int cpu_have_cpuid(void);
-int cpu_phys_address_size(void);
 
 void smm_init(void);
 void smm_lock(void);

src/arch/x86/postcar_loader.c

@@ -16,6 +16,7 @@
 #include <arch/cpu.h>
 #include <cbmem.h>
 #include <console/console.h>
+#include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <program_loading.h>

src/cpu/intel/haswell/romstage.c

@@ -18,6 +18,7 @@
 #include <cbfs.h>
 #include <console/console.h>
 #include <arch/cpu.h>
+#include <cpu/cpu.h>
 #include <cpu/x86/bist.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>

src/include/cpu/cpu.h

@@ -8,6 +8,7 @@ void cpu_initialize(unsigned int cpu_index);
 struct bus;
 void initialize_cpus(struct bus *cpu_bus);
 void asmlinkage secondary_cpu_init(unsigned int cpu_index);
+int cpu_phys_address_size(void);
 
 #define __cpu_driver __attribute__ ((used,__section__(".rodata.cpu_driver")))
 #ifndef __SIMPLE_DEVICE__

src/northbridge/intel/sandybridge/ram_calc.c

@@ -19,6 +19,7 @@
 #include <arch/cpu.h>
 #include <arch/io.h>
 #include <cbmem.h>
+#include <cpu/cpu.h>
 #include <cpu/intel/romstage.h>
 #include <cpu/x86/mtrr.h>
 #include <program_loading.h>

src/soc/intel/common/util.c

@@ -15,6 +15,7 @@
 
 #include <arch/cpu.h>
 #include <console/console.h>
+#include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <soc/intel/common/util.h>
 #include <stddef.h>