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mb/google/volteer: Enable CSE Board Reset Override

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This will ensure that the cold reset is performed when CSE Lite jumps
from RO to RW.

BUG=b:162977697
TEST=Verify CSE reset is cold (sits in S5 for PCH Min Slp Duration time)

Change-Id: Ib1173e219ba46ee3275824220c8cf790b1d497fa
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Tim Wawrzynczak 2020-08-21 13:43:59 -06:00
parent eb7a1dd80e
commit 14025bd5cc
2 changed files with 1 additions and 9 deletions
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1
src/mainboard/google/volteer/Kconfig
View file

@ -33,6 +33,7 @@ if BOARD_GOOGLE_BASEBOARD_VOLTEER
config CHROMEOS config CHROMEOS
bool bool
default y default y
select CHROMEOS_CSE_BOARD_RESET_OVERRIDE if SOC_INTEL_CSE_LITE_SKU
select EC_GOOGLE_CHROMEEC_SWITCHES select EC_GOOGLE_CHROMEEC_SWITCHES
select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_SWITCH_ON
select GBB_FLAG_FORCE_DEV_BOOT_USB select GBB_FLAG_FORCE_DEV_BOOT_USB

9
src/mainboard/google/volteer/mainboard.c
View file

@ -5,19 +5,10 @@
#include <baseboard/variants.h> #include <baseboard/variants.h>
#include <device/device.h> #include <device/device.h>
#include <ec/ec.h> #include <ec/ec.h>
#include <ec/google/chromeec/ec.h>
#include <halt.h>
#include <intelblocks/cse.h>
#include <soc/gpio.h> #include <soc/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/chromeos.h>
#include <variant/gpio.h> #include <variant/gpio.h>
void cse_board_reset(void)
{
if (!google_chromeec_ap_reset())
halt();
}
static void mainboard_init(struct device *dev) static void mainboard_init(struct device *dev)
{ {
mainboard_ec_init(); mainboard_ec_init();