diff --git a/src/soc/intel/common/block/include/intelblocks/lpss.h b/src/soc/intel/common/block/include/intelblocks/lpss.h
index dafe351f02..e80f3ddec5 100644
--- a/src/soc/intel/common/block/include/intelblocks/lpss.h
+++ b/src/soc/intel/common/block/include/intelblocks/lpss.h
@@ -40,4 +40,13 @@ bool lpss_is_controller_in_reset(uintptr_t base);
 /* Set controller power state to D0 or D3*/
 void lpss_set_power_state(const struct device *dev, enum lpss_pwr_state state);
 
+/*
+ * Handler to get list of LPSS controllers. The SOC is expected to send out a
+ * list of pci devfn for all LPSS controllers supported by the SOC.
+ */
+const pci_devfn_t *soc_lpss_controllers_list(size_t *size);
+
+/* Check if the device is a LPSS controller */
+bool is_dev_lpss(const struct device *dev);
+
 #endif	/* SOC_INTEL_COMMON_BLOCK_LPSS_H */
diff --git a/src/soc/intel/common/block/lpss/lpss.c b/src/soc/intel/common/block/lpss/lpss.c
index a519bf65e2..1722dcde08 100644
--- a/src/soc/intel/common/block/lpss/lpss.c
+++ b/src/soc/intel/common/block/lpss/lpss.c
@@ -89,3 +89,21 @@ void lpss_set_power_state(const struct device *dev, enum lpss_pwr_state state)
 
 	pci_update_config8(lpss_dev, PME_CTRL_STATUS, ~POWER_STATE_MASK, state);
 }
+
+bool is_dev_lpss(const struct device *dev)
+{
+	static size_t size;
+	static const pci_devfn_t *lpss_devices;
+
+	if (dev->path.type != DEVICE_PATH_PCI)
+		return false;
+
+	if (!lpss_devices)
+		lpss_devices = soc_lpss_controllers_list(&size);
+
+	for (int i = 0; i < size; i++) {
+		if (lpss_devices[i] == dev->path.pci.devfn)
+			return true;
+	}
+	return false;
+}