AMD K8 fam10-15: Tidy up CAR stack switch

Return to empty stack before making the switch.

Change-Id: I6d6f633933fac5bc08d9542c371715f737fb42cf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20574
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
This commit is contained in:
Kyösti Mälkki 2017-07-13 14:11:52 +03:00
parent 90e07b460c
commit 1438245334
3 changed files with 8 additions and 19 deletions

View file

@ -599,21 +599,14 @@ CAR_FAM10_ap_out:
call cache_as_ram_main call cache_as_ram_main
call post_cache_as_ram call post_cache_as_ram
movl %eax, %esp
call cache_as_ram_new_stack
/* We will not go back. */ /* We will not go back. */
post_code(0xaf) /* Should never see this POST code. */ post_code(0xaf) /* Should never see this POST code. */
.globl cache_as_ram_switch_stack
cache_as_ram_switch_stack:
/* Return address. */
popl %eax
/* New stack. */
popl %eax
movl %eax, %esp
call cache_as_ram_new_stack
all_mtrr_msrs: all_mtrr_msrs:
/* fixed MTRR MSRs */ /* fixed MTRR MSRs */
.long MTRR_FIX_64K_00000 .long MTRR_FIX_64K_00000

View file

@ -125,7 +125,7 @@ static void vErrata343(void)
wrmsr(BU_CFG2_MSR, msr); wrmsr(BU_CFG2_MSR, msr);
} }
void post_cache_as_ram(void) asmlinkage void * post_cache_as_ram(void)
{ {
uint32_t family = amd_fam1x_cpu_family(); uint32_t family = amd_fam1x_cpu_family();
@ -171,12 +171,10 @@ void post_cache_as_ram(void)
/* New stack grows right below migrated_car. */ /* New stack grows right below migrated_car. */
print_car_debug("Switching to use RAM as stack..."); print_car_debug("Switching to use RAM as stack...");
cache_as_ram_switch_stack(migrated_car); return migrated_car;
/* We do not come back. */
} }
void cache_as_ram_new_stack(void) asmlinkage void cache_as_ram_new_stack(void)
{ {
print_car_debug("Disabling cache as RAM now\n"); print_car_debug("Disabling cache as RAM now\n");
disable_cache_as_ram_real(0); // inline disable_cache_as_ram_real(0); // inline

View file

@ -4,10 +4,8 @@
#include <arch/cpu.h> #include <arch/cpu.h>
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void post_cache_as_ram(void); asmlinkage void * post_cache_as_ram(void);
asmlinkage void cache_as_ram_new_stack(void);
void cache_as_ram_switch_stack(void *stacktop);
void cache_as_ram_new_stack(void);
void disable_cache_as_ram(void); void disable_cache_as_ram(void);