soc/intel/skylake: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: Idf00c029331aba30c8bfca71546cad62ff6bb0a7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26541 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -495,13 +495,13 @@ static void generate_p_state_entries(int core, int cores_per_package)
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acpigen_pop_len();
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}
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void generate_cpu_entries(device_t device)
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void generate_cpu_entries(struct device *device)
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{
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int core_id, cpu_id, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6;
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int totalcores = dev_count_cpu();
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int cores_per_package = get_cores_per_package();
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int numcpus = totalcores/cores_per_package;
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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config_t *config = dev->chip_info;
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int is_s0ix_enable = config->s0ix_enable;
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int max_c_state;
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@ -629,7 +629,7 @@ unsigned long acpi_madt_irq_overrides(unsigned long current)
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return current;
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}
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unsigned long southbridge_write_acpi_tables(device_t device,
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unsigned long southbridge_write_acpi_tables(struct device *device,
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unsigned long current,
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struct acpi_rsdp *rsdp)
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{
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@ -640,7 +640,7 @@ unsigned long southbridge_write_acpi_tables(device_t device,
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return acpi_align_current(current);
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}
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void southbridge_inject_dsdt(device_t device)
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void southbridge_inject_dsdt(struct device *device)
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{
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global_nvs_t *gnvs;
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@ -39,7 +39,7 @@ void soc_fsp_load(void)
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fsp_load();
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}
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static void pci_domain_set_resources(device_t dev)
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static void pci_domain_set_resources(struct device *dev)
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{
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assign_resources(dev->link_list);
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}
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@ -60,7 +60,7 @@ static struct device_operations cpu_bus_ops = {
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#endif
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};
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static void soc_enable(device_t dev)
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static void soc_enable(struct device *dev)
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{
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/* Set the operations if it is a special bus type */
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -50,7 +50,7 @@ void soc_fsp_load(void)
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fsps_load(romstage_handoff_is_resume());
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}
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static void pci_domain_set_resources(device_t dev)
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static void pci_domain_set_resources(struct device *dev)
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{
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assign_resources(dev->link_list);
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}
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@ -75,7 +75,7 @@ static struct device_operations cpu_bus_ops = {
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#endif
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};
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static void soc_enable(device_t dev)
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static void soc_enable(struct device *dev)
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{
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/* Set the operations if it is a special bus type */
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -119,7 +119,7 @@ void set_power_limits(u8 power_limit_1_time)
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unsigned int power_unit;
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unsigned int tdp, min_power, max_power, max_time, tdp_pl2;
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u8 power_limit_1_val;
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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config_t *conf = dev->chip_info;
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if (power_limit_1_time > ARRAY_SIZE(power_limit_time_sec_to_msr))
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@ -241,7 +241,7 @@ void set_power_limits(u8 power_limit_1_time)
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static void configure_thermal_target(void)
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{
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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config_t *conf = dev->chip_info;
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msr_t msr;
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@ -261,7 +261,7 @@ static void configure_thermal_target(void)
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static void configure_isst(void)
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{
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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config_t *conf = dev->chip_info;
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msr_t msr;
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@ -287,7 +287,7 @@ static void configure_isst(void)
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static void configure_misc(void)
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{
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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config_t *conf = dev->chip_info;
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msr_t msr;
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@ -419,7 +419,7 @@ static void enable_pm_timer_emulation(void)
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}
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/* All CPUs including BSP will run the following function. */
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void soc_core_init(device_t cpu)
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void soc_core_init(struct device *cpu)
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{
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/* Clear out pending MCEs */
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/* TODO(adurbin): This should only be done on a cold boot. Also, some
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@ -544,7 +544,7 @@ void cpu_lock_sgx_memory(void)
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int soc_fill_sgx_param(struct sgx_param *sgx_param)
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{
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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assert(dev != NULL);
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config_t *conf = dev->chip_info;
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@ -558,7 +558,7 @@ int soc_fill_sgx_param(struct sgx_param *sgx_param)
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}
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int soc_fill_vmx_param(struct vmx_param *vmx_param)
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{
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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assert(dev != NULL);
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config_t *conf = dev->chip_info;
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@ -29,8 +29,8 @@
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void acpi_fill_in_fadt(acpi_fadt_t *fadt);
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unsigned long acpi_madt_irq_overrides(unsigned long current);
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void acpi_mainboard_gnvs(global_nvs_t *gnvs);
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void southbridge_inject_dsdt(device_t device);
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unsigned long southbridge_write_acpi_tables(device_t device,
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void southbridge_inject_dsdt(struct device *device);
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unsigned long southbridge_write_acpi_tables(struct device *device,
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unsigned long current, struct acpi_rsdp *rsdp);
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unsigned long northbridge_write_acpi_tables(struct device *,
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unsigned long current, struct acpi_rsdp *);
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@ -296,7 +296,7 @@ void soc_pch_pirq_init(const struct device *dev)
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{
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const config_t *config = dev->chip_info;
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uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG];
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device_t irq_dev;
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struct device *irq_dev;
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pch_interrupt_routing[0] = config->pirqa_routing;
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pch_interrupt_routing[1] = config->pirqb_routing;
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@ -180,7 +180,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
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write_smrr(relo_params);
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}
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static void fill_in_relocation_params(device_t dev,
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static void fill_in_relocation_params(struct device *dev,
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struct smm_relocation_params *params)
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{
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void *handler_base;
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@ -265,7 +265,7 @@ static void setup_ied_area(struct smm_relocation_params *params)
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void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
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size_t *smm_save_state_size)
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{
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device_t dev = SA_DEV_ROOT;
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struct device *dev = SA_DEV_ROOT;
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printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
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@ -160,7 +160,7 @@ static const struct vr_config default_configs[NUM_VR_DOMAINS] = {
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},
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};
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static uint16_t get_dev_id(device_t dev)
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static uint16_t get_dev_id(struct device *dev)
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{
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return pci_read_config16(dev, PCI_DEVICE_ID);
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}
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