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soc/intel/skylake: Add integrated LAN config parameters 

Add parameters to configure the integrated LAN via FSP.  Since
this takes over a PCI CLKREQ# pin it needs to know which pin
it should use, and there are additional parameters for LTR and
a "K1 power save" feature.

This was tested on a KBL-R board with integrated LAN, verifying
that the device is functional under Linux with the e1000e driver.

Change-Id: Idb200cec90a3c0d4d9c914bae9983a3bcdafcd06
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/22856
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Duncan Laurie 2017-12-13 13:58:35 -08:00
parent 6827cb3857
commit 14485efbb3
2 changed files with 10 additions and 0 deletions
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4
src/soc/intel/skylake/chip.h
View File

@ -135,6 +135,10 @@ struct soc_intel_skylake_config {
/* Lan */
u8 EnableLan;
u8 EnableLanLtr;
u8 EnableLanK1Off;
u8 LanClkReqSupported;
u8 LanClkReqNumber;
/* SATA related */
u8 EnableSata;

6
src/soc/intel/skylake/chip_fsp20.c
View File

@ -186,6 +186,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchPmLanWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx;
params->PchLanEnable = config->EnableLan;
if (config->EnableLan) {
params->PchLanLtrEnable = config->EnableLanLtr;
params->PchLanK1OffEnable = config->EnableLanK1Off;
params->PchLanClkReqSupported = config->LanClkReqSupported;
params->PchLanClkReqNumber = config->LanClkReqNumber;
}
params->SataSalpSupport = config->SataSalpSupport;
params->SsicPortEnable = config->SsicPortEnable;
params->ScsEmmcEnabled = config->ScsEmmcEnabled;