x86: Add Kconfig to disable early bootblock postcodes

The Intel cave creek chipset needs to have port 80 routing configured
before any post codes can be sent to port 80h.  Sending post codes out
before the routing is done will hang the system.

This patch allows us to disable the first couple of post codes that go
out before the routing can be configured.

The Kconfig symbol is selected by the cave creek chipset (fsp_i89xx).

Change-Id: I9bf41669ec32744f87a1ed2de011d31c72ea38da
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12422
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: York Yang <york.yang@intel.com>

src/console/Kconfig

@@ -350,4 +350,13 @@ config POST_IO_PORT
 	  depending on the presence of coprocessors/microcontrollers or if the
 	  platform does not support IO in the conventional x86 manner.
 
+config NO_EARLY_BOOTBLOCK_POSTCODES
+	def_bool n
+	help
+	  Some chipsets require that the routing for the port 80h POST
+	  code be configured before any POST codes are sent out.
+	  This can be done in the boot block, but there are a couple of
+	  POST codes that go out before the chipset's bootblock initialization
+	  can happen.  This option suppresses those POST codes.
+
 endmenu

src/cpu/x86/16bit/entry16.inc

@@ -36,8 +36,9 @@ _start:
 	cli
 	/* Save the BIST result */
 	movl	%eax, %ebp
-
+#if !IS_ENABLED(CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES)
 	post_code(POST_RESET_VECTOR_CORRECT)
+#endif
 
 	/* IMMEDIATELY invalidate the translation lookaside buffer (TLB) before
 	 * executing any further code. Even though paging is disabled we

src/cpu/x86/32bit/entry32.inc

@@ -56,7 +56,9 @@ __protected_start:
 	/* Save the BIST value */
 	movl	%eax, %ebp
 
+#if !IS_ENABLED(CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES)
 	post_code(POST_ENTER_PROTECTED_MODE)
+#endif
 
 	movw	$ROM_DATA_SEG, %ax
 	movw	%ax, %ds

src/southbridge/intel/fsp_i89xx/Kconfig

@@ -34,6 +34,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select SPI_FLASH
 	select COMMON_FADT
 	select HAVE_INTEL_FIRMWARE
+	select NO_EARLY_BOOTBLOCK_POSTCODES
 
 config EHCI_BAR
 	hex