mb/google/hatch/baseboard: Use chipset devicetree references
Switch baseboard devicetree to use chipset devicetree references. Drop any devices whose status (on/off/hidden) matches the default in the chipset DT. TEST=build/boot google/hatch (akemi) Change-Id: I5954c304f3c0e04be7e061c1c23a278f81b6ff4d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Martin L Roth <gaumless@gmail.com>
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@ -198,163 +198,126 @@ chip soc/intel/cannonlake
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device cpu_cluster 0 on end
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device domain 0 on
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device pci 00.0 on end # Host Bridge
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device pci 02.0 on end # Integrated Graphics Device
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device pci 04.0 off end # SA Thermal device
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device pci 05.0 off end # SA IPU
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device pci 12.0 on end # Thermal Subsystem
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device pci 12.5 off end # UFS SCS
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device pci 12.6 off end # GSPI #2
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device pci 14.0 on
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device ref igpu on end
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device ref thermal on end
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device ref xhci on
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chip drivers/usb/acpi
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register "desc" = ""Root Hub""
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register "type" = "UPC_TYPE_HUB"
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device usb 0.0 on
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""Left Type-C Port""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device usb 2.0 on end
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-C Port 1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device usb 2.1 on end
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left Type-A Port""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(1, 2)"
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device usb 2.2 on end
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-A Port 1""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(2, 2)"
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device usb 2.3 on end
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device ref usb2_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""WWAN""
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register "type" = "UPC_TYPE_INTERNAL"
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device usb 2.5 on end
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device ref usb2_port6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Camera""
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register "type" = "UPC_TYPE_INTERNAL"
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device usb 2.6 on end
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device ref usb2_port7 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C14)"
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device usb 2.9 on end
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device ref usb2_port10 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left Type-C Port""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device usb 3.0 on end
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device ref usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-C Port 1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device usb 3.1 on end
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device ref usb3_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left Type-A Port""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(1, 2)"
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device usb 3.2 on end
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device ref usb3_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-A Port 1""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(2, 2)"
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device usb 3.3 on end
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device ref usb3_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""WWAN""
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register "type" = "UPC_TYPE_INTERNAL"
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device usb 3.4 on end
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device ref usb3_port5 on end
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end
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end
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end
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end # USB xHCI
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device pci 14.1 off end # USB xDCI (OTG)
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device pci 14.3 on
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "GPE0_PME_B0"
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device generic 0 on end
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end
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end # CNVi wifi
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device pci 14.5 off end # SDCard
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device pci 15.0 on end # I2C #0
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device pci 15.1 on end # I2C #1
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device pci 15.2 off end # I2C #2
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device pci 15.3 off end # I2C #3
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT Redirection
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device pci 16.4 off end # Management Engine Interface 3
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device pci 16.5 off end # Management Engine Interface 4
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device pci 17.0 on end # SATA
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device pci 19.0 on end # I2C #4
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device pci 19.1 off end # I2C #5
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device pci 19.2 off end # UART #2
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device pci 1a.0 off end # eMMC
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device pci 1c.0 off end # PCI Express Port 1 (USB)
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device pci 1c.1 off end # PCI Express Port 2 (USB)
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device pci 1c.2 off end # PCI Express Port 3 (USB)
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device pci 1c.3 off end # PCI Express Port 4 (USB)
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device pci 1c.4 off end # PCI Express Port 5 (USB)
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device pci 1c.5 off end # PCI Express Port 6
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device pci 1c.6 off end # PCI Express Port 7
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device pci 1c.7 off end # PCI Express Port 8
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device pci 1d.0 on # PCI Express Port 9 (X4 NVME)
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register "PcieRpSlotImplemented[8]" = "1"
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end
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device pci 1d.1 off end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1d.4 off end # PCI Express port 13
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device pci 1d.5 on
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device ref i2c0 on end
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device ref i2c1 on end
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device ref sata on end
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device ref i2c4 on end
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device ref pcie_rp9 on
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register "PcieRpSlotImplemented[8]" = "1"
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end # (x4 NVMe)
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device ref pcie_rp14 on
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chip drivers/wifi/generic
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register "wake" = "GPE0_DW1_01"
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device pci 00.0 on end
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end
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register "PcieRpSlotImplemented[13]" = "1"
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end # PCI Express Port 14 (x4)
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device pci 1e.0 on end # UART #0
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device pci 1e.1 off end # UART #1
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device pci 1e.2 on
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end # (x1 WiFi)
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device ref uart0 on end
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device ref gspi0 on
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chip drivers/spi/acpi
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register "hid" = "ACPI_DT_NAMESPACE_HID"
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register "compat_string" = ""google,cr50""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C21_IRQ)"
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device spi 0 on end
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end
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end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1f.0 on
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end
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device ref lpc_espi on
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chip ec/google/chromeec
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device pnp 0c09.0 on end
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end
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end # eSPI Interface
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device pci 1f.1 on end # P2SB
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device pci 1f.2 hidden end # Power Management Controller
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device pci 1f.3 on
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end
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device ref p2sb on end
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device ref hda on
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chip drivers/sof
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register "spkr_tplg" = "max98357a"
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register "jack_tplg" = "rt5682"
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register "mic_tplg" = "_2ch_pdm0"
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device generic 0 on end
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end
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end # Intel HDA
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device pci 1f.4 on end # SMBus
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device pci 1f.5 on end # PCH SPI
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device pci 1f.6 off end # GbE
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end
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device ref smbus on end
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end
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end
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