x86: link romstage like the other architectures
All the other architectures are using the memlayout for linking romstage. Use that same method on x86 as well for consistency. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built a myriad of boards. Analyzed readelf output. Change-Id: I016666c4b01410df112e588c2949e3fc64540c2e Signed-off-by: Aaron Durbin <adubin@chromium.org> Reviewed-on: http://review.coreboot.org/11510 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -113,8 +113,7 @@ endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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romstage-srcs += $(src)/arch/x86/romstage.ld
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romstage-srcs += $(src)/cpu/x86/32bit/entry32.ld
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romstage-y += romstage.ld
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# Chipset specific assembly stubs in the romstage program flow. Certain
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# boards have more than one assembly stub so collect those and put them
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@ -193,11 +192,11 @@ $(objcbfs)/romstage.debug: $$(romstage-objs) $(objgenerated)/romstage.ld $$(roms
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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$(LD_romstage) --gc-sections -nostdlib -nostartfiles -static -o $@ -L$(obj) $(COMPILER_RT_FLAGS_romstage) --whole-archive --start-group $(filter-out %.ld,$(romstage-objs)) $(romstage-libs) --no-whole-archive $(COMPILER_RT_romstage) --end-group -T $(objgenerated)/romstage.ld --oformat $(romstage-oformat)
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$(objgenerated)/romstage_null.ld: $$(filter %.ld,$$(romstage-objs))
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$(objgenerated)/romstage_null.ld: $(obj)/arch/x86/romstage.romstage.ld
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@printf " GEN $(subst $(obj)/,,$(@))\n"
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rm -f $@
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printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp
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cat $^ >> $@.tmp
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cat $< >> $@.tmp
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mv $@.tmp $@
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$(objgenerated)/romstage.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xip.txt
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@ -17,9 +17,15 @@
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* Foundation, Inc.
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*/
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#include <rules.h>
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PHDRS
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{
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to_load PT_LOAD;
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}
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#if ENV_RAMSTAGE
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ENTRY(_start)
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#elif ENV_ROMSTAGE
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ENTRY(protected_start)
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#endif
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@ -20,6 +20,12 @@
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#ifndef __ARCH_MEMLAYOUT_H
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#define __ARCH_MEMLAYOUT_H
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/* Currently empty to satisfy common arch requirements. */
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#include <rules.h>
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#if ENV_ROMSTAGE
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/* No .data or .bss in romstage. Cache as ram is handled separately. */
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#define ARCH_STAGE_HAS_DATA_SECTION 0
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#define ARCH_STAGE_HAS_BSS_SECTION 0
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#endif
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#endif /* __ARCH_MEMLAYOUT_H */
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@ -3,6 +3,7 @@
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*
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* Copyright (C) 2006 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2010 coresystems GmbH
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* Copyright 2015 Google Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -18,52 +19,25 @@
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* Foundation, Inc.
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*/
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TARGET(binary)
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#include <memlayout.h>
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#include <arch/header.ld>
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SECTIONS
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{
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. = ROMSTAGE_BASE;
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.rom . : {
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_rom = .;
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*(.rom.text);
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*(.rom.data);
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*(.text);
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*(.text.*);
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. = ALIGN(4);
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_cbmem_init_hooks = .;
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KEEP(*(.rodata.cbmem_init_hooks));
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_ecbmem_init_hooks = .;
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*(.rodata);
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*(.rodata.*);
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. = ALIGN(16);
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_erom = .;
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}
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/DISCARD/ : {
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*(.comment)
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*(.note)
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*(.comment.*)
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*(.note.*)
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*(.eh_frame);
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}
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/* The 1M size is not allocated. It's just for basic size checking. */
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ROMSTAGE(ROMSTAGE_BASE, 1M)
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. = CONFIG_DCACHE_RAM_BASE;
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.car.data . (NOLOAD) : {
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_car_data_start = .;
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#if IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION)
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_timestamp = .;
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. = . + 0x100;
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_etimestamp = .;
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TIMESTAMP(., 0x100)
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#endif
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*(.car.global_data);
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_car_data_end = .;
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/* The preram cbmem console area comes last to take advantage
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* of a zero-sized array to hold the memconsole contents.
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* However, collisions within the cache-as-ram region cannot be
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* statically checked because the cache-as-ram region usage is
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* cpu/chipset dependent. */
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_preram_cbmem_console = .;
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_epreram_cbmem_console = . + (CONFIG_LATE_CBMEM_INIT ? 0 : 0xc00);
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PRERAM_CBMEM_CONSOLE(., (CONFIG_LATE_CBMEM_INIT ? 0 : 0xc00))
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}
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/* Global variables are not allowed in romstage
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@ -1 +0,0 @@
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ENTRY(protected_start)
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@ -192,12 +192,12 @@ smm-y += halt.c
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secmon-y += halt.c
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ifneq ($(CONFIG_ARCH_X86),y)
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# X86 bootblock and romstage use custom ldscripts that are all glued together,
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# X86 bootblock uses custom ldscripts that are all glued together,
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# so we need to exclude it here or it would pick these up as well
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bootblock-y += program.ld
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romstage-y += program.ld
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endif
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romstage-y += program.ld
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ramstage-y += program.ld
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ifeq ($(CONFIG_RELOCATABLE_MODULES),y)
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@ -27,6 +27,12 @@
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.text : {
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_program = .;
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_text = .;
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/*
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* The .rom.* sections are to acommodate x86 romstage. romcc as well
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* as the assembly files put their text and data in these sections.
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*/
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*(.rom.text);
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*(.rom.data);
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*(.text._start);
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*(.text.stage_entry);
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*(.text);
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