Drop drivers/generic/debug

Not very popular nor useful nowadays.

Change-Id: I3dc0f7aaf188950a43f5350d3a95669fbbdcfd94
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4554
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

documentation/Kconfig.tex

@@ -337,22 +337,6 @@ That's it for the BSP I/O and HT busses. Now we begin the AP busses. Not much he
 
 
 \end{verbatim}
-\begin{verbatim}
-  end # domain
-#  chip drivers/generic/debug
-#    device pnp 0.0 off end # chip name
-#    device pnp 0.1 on end # pci_regs_all
-#    device pnp 0.2 off end # mem
-#    device pnp 0.3 off end # cpuid
-#    device pnp 0.4 off end # smbus_regs_all
-#    device pnp 0.5 off end # dual core msr
-#    device pnp 0.6 off end # cache size
-#    device pnp 0.7 off end # tsc
-#       end
-
-end
-\end{verbatim}
-This is a trick used to debug by creating entries in the device tree.
 
 \subsection{cpu socket}
 The CPU socket is the key link from mainboard to its CPUs. Since many models of CPU can go in a socket, the mainboard mentions only

src/drivers/generic/Kconfig

@@ -1,3 +1,2 @@
-source src/drivers/generic/debug/Kconfig
 source src/drivers/generic/generic/Kconfig
 source src/drivers/generic/ioapic/Kconfig

src/drivers/generic/Makefile.inc

@@ -1,3 +1,2 @@
-subdirs-y += debug
 subdirs-y += generic
 subdirs-y += ioapic

src/drivers/generic/debug/Kconfig

@@ -1,2 +0,0 @@
-config DRIVERS_GENERIC_DEBUG
-	bool

src/drivers/generic/debug/Makefile.inc

@@ -1 +0,0 @@
-ramstage-$(CONFIG_DRIVERS_GENERIC_DEBUG) += debug_dev.c

src/drivers/generic/debug/debug_dev.c

@@ -1,289 +0,0 @@
-#include <console/console.h>
-#include <device/device.h>
-#include <device/smbus.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include <cpu/x86/msr.h>
-#include <reset.h>
-#include <delay.h>
-
-static void print_pci_regs(struct device *dev)
-{
-      uint8_t byte;
-      int i;
-
-      for(i=0;i<256;i++) {
-	      byte = pci_read_config8(dev, i);
-
-	      if((i & 0xf)==0) printk(BIOS_DEBUG, "\n%02x:",i);
-	      printk(BIOS_DEBUG, " %02x",byte);
-      }
-      printk(BIOS_DEBUG, "\n");
-}
-
-static void print_mem(void)
-{
-        unsigned int i;
-	unsigned int start = 0xfffff000;
-	for(i=start;i<0xffffffff;i++) {
-             if((i & 0xf)==0) printk(BIOS_DEBUG, "\n %08x:",i);
-             printk(BIOS_DEBUG, " %02x",(unsigned char)*((unsigned char *)i));
-             }
-	printk(BIOS_DEBUG, " %02x\n",(unsigned char)*((unsigned char *)i));
-
- }
-static void print_pci_regs_all(void)
-{
-        struct device *dev;
-	unsigned bus, device, function;
-
-	for(bus=0; bus<256; bus++) {
-		for(device=0; device<=0x1f; device++) {
-			for (function=0; function<=7; function++){
-				unsigned devfn;
-				devfn = PCI_DEVFN(device, function);
-				dev = dev_find_slot(bus, devfn);
-				if(!dev) {
-					continue;
-				}
-				if(!dev->enabled) {
-					continue;
-				}
-			        printk(BIOS_DEBUG, "\n%02x:%02x:%02x aka %s",
-					bus, device, function, dev_path(dev));
-				print_pci_regs(dev);
-			}
-		}
-	}
-}
-
-static void print_cpuid(void)
-{
-	msr_t msr;
-	unsigned index;
-	unsigned eax, ebx, ecx, edx;
-	index = 0x80000007;
-	printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
-	asm volatile(
-		"cpuid"
-		: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
-		: "a" (index)
-		);
-	printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
-		index, eax, ebx, ecx, edx);
-	if (edx & (3 << 1)) {
-		index = 0xC0010042;
-		printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
-		msr = rdmsr(index);
-		printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x\n",
-			index, msr.hi, msr.lo);
-	}
-
-}
-static void print_smbus_regs(struct device *dev)
-{
-	int j;
-	printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link_num);
-	printk(BIOS_DEBUG, "%s", dev_path(dev));
-	for(j = 0; j < 256; j++) {
-		int status;
-		unsigned char byte;
-		status = smbus_read_byte(dev, j);
-		if (status < 0) {
-		//	printk(BIOS_DEBUG, "bad device status= %08x\n", status);
-			break;
-		}
-                if ((j & 0xf) == 0) {
-                        printk(BIOS_DEBUG, "\n%02x: ", j);
-                }
-		byte = status & 0xff;
-		printk(BIOS_DEBUG, "%02x ", byte);
-	}
-	printk(BIOS_DEBUG, "\n");
-}
-
-static void print_smbus_regs_all(struct device *dev)
-{
-	struct device *child;
-	struct bus *link;
-	if (dev->enabled && dev->path.type == DEVICE_PATH_I2C)
-	{
-		// Here don't need to call smbus_set_link, because we scan it from top to down
-		if( dev->bus->dev->path.type == DEVICE_PATH_I2C) { // it's under i2c MUX so set mux at first
-			if(ops_smbus_bus(get_pbus_smbus(dev->bus->dev))) {
-				if(dev->bus->dev->ops && dev->bus->dev->ops->set_link)
-					dev->bus->dev->ops->set_link(dev->bus->dev, dev->bus->link_num);
-			}
-		}
-
-		if(ops_smbus_bus(get_pbus_smbus(dev))) print_smbus_regs(dev);
-	}
-
-	for(link = dev->link_list; link; link = link->next) {
-		for (child = link->children; child; child = child->sibling) {
-			print_smbus_regs_all(child);
-        	}
-	}
-}
-static void print_msr_dualcore(void)
-{
-        msr_t msr;
-        unsigned index;
-        unsigned eax, ebx, ecx, edx;
-        index = 0x80000008;
-        printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
-        asm volatile(
-                "cpuid"
-                : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
-                : "a" (index)
-                );
-        printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
-                index, eax, ebx, ecx, edx);
-
-        printk(BIOS_DEBUG, "core number %d\n", ecx & 0xff);
-
-        index = 0xc001001f;
-        printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
-        msr = rdmsr(index);
-        printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x bit 54 is %d\n",
-                index, msr.hi, msr.lo, (msr.hi>> (54-32)) & 1);
-#if 0
-        msr.hi |= (1<<(54-32));
-        wrmsr(index, msr);
-
-        msr = rdmsr(index);
-        printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x\n",
-                index, msr.hi, msr.lo);
-#endif
-
-}
-
-static void print_cache_size(void)
-{
-	unsigned index;
-	unsigned int n, eax, ebx, ecx, edx;
-
-        index = 0x80000000;
-        printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
-        asm volatile(
-                "cpuid"
-                : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
-                : "a" (index)
-                );
-        n = eax;
-
-        if (n >= 0x80000005) {
-	        index = 0x80000005;
-	        printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
-        	asm volatile(
-                	"cpuid"
-	                : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
-        	        : "a" (index)
-                	);
-                printk(BIOS_DEBUG, "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
-                        edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
-        }
-
-        if (n >= 0x80000006) {
-                index = 0x80000006;
-                printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
-                asm volatile(
-                        "cpuid"
-                        : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
-                        : "a" (index)
-                        );
-        	printk(BIOS_DEBUG, "CPU: L2 Cache: %dK (%d bytes/line)\n",
-                	ecx >> 16, ecx & 0xFF);
-        }
-
-}
-
-struct tsc_struct {
-        unsigned lo;
-        unsigned hi;
-};
-typedef struct tsc_struct tsc_t;
-
-static tsc_t rdtsc(void)
-{
-        tsc_t res;
-        asm volatile(
-                "rdtsc"
-                : "=a" (res.lo), "=d"(res.hi) /* outputs */
-                );
-        return res;
-}
-
-static void print_tsc(void) {
-
-	tsc_t tsc;
-	tsc = rdtsc();
-        printk(BIOS_DEBUG, "tsc: 0x%08x%08x\n",
-                     tsc.hi, tsc.lo);
-	udelay(1);
-        tsc = rdtsc();
-        printk(BIOS_DEBUG, "tsc: 0x%08x%08x after udelay(1) \n",
-                     tsc.hi, tsc.lo);
-
-}
-
-static void debug_init(device_t dev)
-{
-	device_t parent;
-
-	if (!dev->enabled)
-		return;
-	switch(dev->path.pnp.device) {
-	case 0:
-		parent = dev->bus->dev;
-		printk(BIOS_DEBUG, "DEBUG: %s : %s\n", dev_path(parent), dev_name(parent));
-		break;
-
-	case 1:
-		print_pci_regs_all();
-		break;
-	case 2:
-		print_mem();
-		break;
-	case 3:
-		print_cpuid();
-		break;
-	case 4:
-		print_smbus_regs_all(&dev_root);
-		break;
-        case 5:
-                print_msr_dualcore();
-                break;
-	case 6:
-		print_cache_size();
-		break;
-	case 7:
-		print_tsc();
-		break;
-	case 8:
-		hard_reset();
-		break;
-	}
-}
-
-static void debug_noop(device_t dummy)
-{
-}
-
-static struct device_operations debug_operations = {
-        .read_resources   = debug_noop,
-        .set_resources    = debug_noop,
-        .enable_resources = debug_noop,
-        .init             = debug_init,
-};
-
-static void enable_dev(struct device *dev)
-{
-	dev->ops = &debug_operations;
-}
-
-struct chip_operations drivers_generic_debug_ops = {
-	CHIP_NAME("Debug device")
-	.enable_dev = enable_dev,
-};

src/mainboard/amd/bimini_fam10/devicetree.cb

@@ -92,18 +92,4 @@ chip northbridge/amd/amdfam10/root_complex
 #		end
 #	end #domain
 
-#	  chip drivers/generic/debug
-#		 device pnp 0.0 off end # chip name
-#		  device pnp 0.1 on end # pci_regs_all
-#		  device pnp 0.2 off end # mem
-#		  device pnp 0.3 off end # cpuid
-#		  device pnp 0.4 off end # smbus_regs_all
-#		  device pnp 0.5 off end # dual core msr
-#		  device pnp 0.6 off end # cache size
-#		  device pnp 0.7 off end # tsc
-#		  device pnp 0.8 off end # hard reset
-#		  device pnp 0.9 off end # mcp55
-#		  device pnp 0.a on end # GH ext table
-#	 end
-
 end

src/mainboard/amd/mahogany_fam10/devicetree.cb

@@ -126,18 +126,4 @@ chip northbridge/amd/amdfam10/root_complex
 #		end
 #	end #domain
 
-#	  chip drivers/generic/debug
-#		 device pnp 0.0 off end # chip name
-#		  device pnp 0.1 on end # pci_regs_all
-#		  device pnp 0.2 off end # mem
-#		  device pnp 0.3 off end # cpuid
-#		  device pnp 0.4 off end # smbus_regs_all
-#		  device pnp 0.5 off end # dual core msr
-#		  device pnp 0.6 off end # cache size
-#		  device pnp 0.7 off end # tsc
-#		  device pnp 0.8 off end # hard reset
-#		  device pnp 0.9 off end # mcp55
-#		  device pnp 0.a on end # GH ext table
-#	 end
-
 end

src/mainboard/amd/serengeti_cheetah/devicetree.cb

@@ -144,17 +144,6 @@ chip northbridge/amd/amdk8/root_complex
 
 
 	end #domain
-#        chip drivers/generic/debug
-#        	device pnp 0.0 off end # chip name
-#                device pnp 0.1 on end # pci_regs_all
-#                device pnp 0.2 off end # mem
-#                device pnp 0.3 off end # cpuid
-#                device pnp 0.4 off end # smbus_regs_all
-#                device pnp 0.5 off end # dual core msr
-#                device pnp 0.6 off end # cache size
-#                device pnp 0.7 off end # tsc
-#       end
-
 end
 
 

src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb

@@ -134,20 +134,6 @@ chip northbridge/amd/amdfam10/root_complex
 #		end
 #	end #domain
 
-#	  chip drivers/generic/debug
-#		 device pnp 0.0 off end # chip name
-#		  device pnp 0.1 on end # pci_regs_all
-#		  device pnp 0.2 off end # mem
-#		  device pnp 0.3 off end # cpuid
-#		  device pnp 0.4 off end # smbus_regs_all
-#		  device pnp 0.5 off end # dual core msr
-#		  device pnp 0.6 off end # cache size
-#		  device pnp 0.7 off end # tsc
-#		  device pnp 0.8 off end # hard reset
-#		  device pnp 0.9 off end # mcp55
-#		  device pnp 0.a on end # GH ext table
-#	 end
-
 end
 
 

src/mainboard/amd/tilapia_fam10/devicetree.cb

@@ -127,17 +127,4 @@ chip northbridge/amd/amdfam10/root_complex
 #		end
 #	end #domain
 
-#	  chip drivers/generic/debug
-#		 device pnp 0.0 off end # chip name
-#		  device pnp 0.1 on end # pci_regs_all
-#		  device pnp 0.2 off end # mem
-#		  device pnp 0.3 off end # cpuid
-#		  device pnp 0.4 off end # smbus_regs_all
-#		  device pnp 0.5 off end # dual core msr
-#		  device pnp 0.6 off end # cache size
-#		  device pnp 0.7 off end # tsc
-#		  device pnp 0.8 off end # hard reset
-#		  device pnp 0.9 off end # mcp55
-#		  device pnp 0.a on end # GH ext table
-#	 end
 end

src/mainboard/broadcom/blast/devicetree.cb

@@ -119,16 +119,5 @@ chip northbridge/amd/amdk8/root_complex
 
 
 	end #domain
-#        chip drivers/generic/debug
-#                device pnp 0.0 off end # chip name
-#                device pnp 0.1 on end # pci_regs_all
-#                device pnp 0.2 off end # mem
-#                device pnp 0.3 off end # cpuid
-#                device pnp 0.4 off end # smbus_regs_all
-#                device pnp 0.5 off end # dual core msr
-#                device pnp 0.6 off end # cache size
-#                device pnp 0.7 off end # tsc
-#       end
-
 end
 

src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb

@@ -89,16 +89,4 @@ chip northbridge/amd/amdk8/root_complex
 
 	end # PCI domain
 
-#       chip drivers/generic/debug
-#               device pnp 0.0 off end # chip name
-#               device pnp 0.1 on end # pci_regs_all
-#               device pnp 0.2 off end # mem
-#               device pnp 0.3 off end # cpuid
-#               device pnp 0.4 off end # smbus_regs_all
-#               device pnp 0.5 off end # dual core msr
-#               device pnp 0.6 off end # cache size
-#               device pnp 0.7 off end # tsc
-#               device pnp 0.8 off end # io
-#               device pnp 0.9 off end # io
-#       end
 end #root_complex

src/mainboard/gigabyte/m57sli/devicetree.cb

@@ -151,16 +151,4 @@ device domain 0 on				# PCI domain
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 on end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 off end			# io
-  # end
 end

src/mainboard/iwill/dk8_htx/devicetree.cb

@@ -114,17 +114,6 @@ chip northbridge/amd/amdk8/root_complex
 		end
 
 	end #domain
-#        chip drivers/generic/debug
-#        	device pnp 0.0 off end # chip name
-#                device pnp 0.1 on end # pci_regs_all
-#                device pnp 0.2 off end # mem
-#                device pnp 0.3 off end # cpuid
-#                device pnp 0.4 off end # smbus_regs_all
-#                device pnp 0.5 off end # dual core msr
-#                device pnp 0.6 off end # cache size
-#                device pnp 0.7 off end # tsc
-#       end
-
 end
 
 

src/mainboard/msi/ms7260/devicetree.cb

@@ -140,17 +140,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # TODO
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 on end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 off end			# io
-  # end
 end

src/mainboard/msi/ms9185/devicetree.cb

@@ -82,17 +82,6 @@ chip northbridge/amd/amdk8/root_complex
                        device pci 18.3 on end
                end # amdk8
        end #domain
-#        chip drivers/generic/debug
-#              device pnp 0.0 off end # chip name
-#                device pnp 0.1 on end # pci_regs_all
-#                device pnp 0.2 off end # mem
-#                device pnp 0.3 off end # cpuid
-#                device pnp 0.4 off end # smbus_regs_all
-#                device pnp 0.5 off end # dual core msr
-#                device pnp 0.6 off end # cache size
-#                device pnp 0.7 off end # tsc
-#       end
-
 end
 
 

src/mainboard/msi/ms9282/devicetree.cb

@@ -179,12 +179,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end
-  #   device pnp 0.1 off end
-  #   device pnp 0.2 off end
-  #   device pnp 0.3 off end
-  #   device pnp 0.4 off end
-  #   device pnp 0.5 on end
-  # end
 end

src/mainboard/msi/ms9652_fam10/devicetree.cb

@@ -166,16 +166,4 @@ chip northbridge/amd/amdfam10/root_complex	# Root complex
       device pci 18.4 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 on end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 off end			# io
-  # end
 end

src/mainboard/nvidia/l1_2pvv/devicetree.cb

@@ -177,16 +177,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 on end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 off end			# io
-  # end
 end

src/mainboard/supermicro/h8dme/devicetree.cb

@@ -123,16 +123,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 off end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 on end			# io
-  # end
 end

src/mainboard/supermicro/h8dmr/devicetree.cb

@@ -143,16 +143,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 off end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 on end			# io
-  # end
 end

src/mainboard/supermicro/h8dmr_fam10/devicetree.cb

@@ -149,16 +149,4 @@ chip northbridge/amd/amdfam10/root_complex	# Root complex
       device pci 19.4 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 off end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 on end			# io
-  # end
 end

src/mainboard/supermicro/h8qme_fam10/devicetree.cb

@@ -112,16 +112,4 @@ chip northbridge/amd/amdfam10/root_complex	# Root complex
       device pci 19.4 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 off end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 on end			# io
-  # end
 end

src/mainboard/supermicro/h8scm_fam10/devicetree.cb

@@ -120,20 +120,6 @@ chip northbridge/amd/amdfam10/root_complex
 #		end
 #	end #domain
 
-#	  chip drivers/generic/debug
-#		 device pnp 0.0 off end # chip name
-#		  device pnp 0.1 on end # pci_regs_all
-#		  device pnp 0.2 off end # mem
-#		  device pnp 0.3 off end # cpuid
-#		  device pnp 0.4 off end # smbus_regs_all
-#		  device pnp 0.5 off end # dual core msr
-#		  device pnp 0.6 off end # cache size
-#		  device pnp 0.7 off end # tsc
-#		  device pnp 0.8 off end # hard reset
-#		  device pnp 0.9 off end # mcp55
-#		  device pnp 0.a on end # GH ext table
-#	 end
-
 end
 
 

src/mainboard/supermicro/x6dhe_g/Kconfig

@@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
 	select BOARD_ROMSIZE_KB_1024
-	select DRIVERS_GENERIC_DEBUG
 
 config MAINBOARD_DIR
 	string

src/mainboard/supermicro/x6dhe_g/devicetree.cb

@@ -1,10 +1,4 @@
 chip northbridge/intel/e7520  # MCH
-	chip drivers/generic/debug  # DEBUGGING
-		device pnp 00.0 on end
-		device pnp 00.1 off end
-		device pnp 00.2 off end
-		device pnp 00.3 off end
-	end
 	device domain 0 on
 		subsystemid 0x15d9 0x6080 inherit
 		chip southbridge/intel/esb6300	# ESB6300

src/mainboard/supermicro/x6dhe_g2/Kconfig

@@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_MP_TABLE
 	select BOARD_ROMSIZE_KB_1024
 	select USE_WATCHDOG_ON_BOOT
-	select DRIVERS_GENERIC_DEBUG
 
 config MAINBOARD_DIR
 	string

src/mainboard/supermicro/x6dhe_g2/devicetree.cb

@@ -1,10 +1,4 @@
 chip northbridge/intel/e7520  # MCH
-	chip drivers/generic/debug  # DEBUGGING
-		device pnp 00.0 off end
-		device pnp 00.1 off end
-		device pnp 00.2 off end
-		device pnp 00.3 off end
-	end
 	device domain 0 on
 		subsystemid 0x15d9 0x6080 inherit
 		chip southbridge/intel/i82801ex	# ICH5R

src/mainboard/tyan/s2885/devicetree.cb

@@ -119,14 +119,5 @@ chip northbridge/amd/amdk8/root_complex
 		end
 
 	end #domain
-
-#        chip drivers/generic/debug
-#                device pnp 0.0 off end
-#                device pnp 0.1 off end
-#                device pnp 0.2 off end
-#                device pnp 0.3 off end
-#		device pnp 0.4 off end
-#		device pnp 0.5 on end
-#        end
 end
 

src/mainboard/tyan/s2891/devicetree.cb

@@ -134,15 +134,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 off end			# pci_regs_all
-  #   device pnp 0.2 off end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 off end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 on  end			# hard_reset
-  # end
 end

src/mainboard/tyan/s2892/devicetree.cb

@@ -137,12 +137,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end
-  #   device pnp 0.1 off end
-  #   device pnp 0.2 off end
-  #   device pnp 0.3 off end
-  #   device pnp 0.4 off end
-  #   device pnp 0.5 on end
-  # end
 end

src/mainboard/tyan/s2895/devicetree.cb

@@ -150,14 +150,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 19.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 off end			# pci_regs_all
-  #   device pnp 0.2 off end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on  end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  # end
 end

src/mainboard/tyan/s2912/devicetree.cb

@@ -135,16 +135,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 on end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 off end			# io
-  # end
 end

src/mainboard/tyan/s2912_fam10/devicetree.cb

@@ -138,16 +138,4 @@ chip northbridge/amd/amdfam10/root_complex	# Root complex
       device pci 18.4 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 on end			# pci_regs_all
-  #   device pnp 0.2 on end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 on end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 off end			# io
-  #   device pnp 0.9 off end			# io
-  # end
 end

src/mainboard/tyan/s4882/devicetree.cb

@@ -192,15 +192,5 @@ chip northbridge/amd/amdk8/root_complex
 		end
 
 	end
-#        chip drivers/generic/debug
-#                device pnp 0.0 off end # chip name
-#                device pnp 0.1 off end # pci_regs_all
-#                device pnp 0.2 off end # mem
-#                device pnp 0.3 on end # cpuid
-#                device pnp 0.4 off end # smbus_regs_all
-#		device pnp 0.5 on end # dual core msr
-#		device pnp 0.6 on end # cache size
-#		device pnp 0.7 on end # tsc
-#        end
 end
 

src/mainboard/winent/mb6047/devicetree.cb

@@ -117,15 +117,4 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device pci 18.3 on end
     end
   end
-  # chip drivers/generic/debug
-  #   device pnp 0.0 off end			# chip name
-  #   device pnp 0.1 off end			# pci_regs_all
-  #   device pnp 0.2 off end			# mem
-  #   device pnp 0.3 off end			# cpuid
-  #   device pnp 0.4 off end			# smbus_regs_all
-  #   device pnp 0.5 off end			# dual core msr
-  #   device pnp 0.6 off end			# cache size
-  #   device pnp 0.7 off end			# tsc
-  #   device pnp 0.8 on  end			# hard_reset
-  # end
 end