From 149b2dcb465ad70b5392d70ed2fccfd149df0fce Mon Sep 17 00:00:00 2001
From: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Date: Fri, 21 Aug 2020 18:13:10 +0530
Subject: [PATCH] mb/intel/jasperlake_rvp: Configure GPIO pad to enable I2C4

Includes changes related to GPIO pad to configure I2C4 required for UFC

Change-Id: Ica3ac31f10214b8aff3bb64a2c3b42ccfa28bdcd
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
---
 src/mainboard/intel/jasperlake_rvp/mainboard.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/mainboard/intel/jasperlake_rvp/mainboard.c b/src/mainboard/intel/jasperlake_rvp/mainboard.c
index 3b9dff990a..315d47d2b0 100644
--- a/src/mainboard/intel/jasperlake_rvp/mainboard.c
+++ b/src/mainboard/intel/jasperlake_rvp/mainboard.c
@@ -3,10 +3,14 @@
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
 #include <device/device.h>
+#include <intelblocks/pcr.h>
 #include <soc/gpio.h>
+#include <soc/pcr_ids.h>
 #include <smbios.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
+#define SERIAL_IO_PCR_GPPRVRW4	0x60C
+
 static void mainboard_init(void *chip_info)
 {
 	const struct pad_config *pads;
@@ -14,6 +18,9 @@ static void mainboard_init(void *chip_info)
 
 	pads = variant_gpio_table(&num);
 	gpio_configure_pads(pads, num);
+
+	if (CONFIG(DRIVERS_INTEL_MIPI_CAMERA))
+		pcr_write32(PID_SERIALIO, SERIAL_IO_PCR_GPPRVRW4, BIT8);
 }
 
 static void mainboard_enable(struct device *dev)