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soc/intel/meteorlake: Make use of is_devfn_enabled() function 

1. Replace all pcidev_path_on_root() and is_dev_enabled()
functions combination with is_devfn_enabled().
2. Remove unused local variable of device structure type
(struct device *).
3. Replace pcidev_path_on_root() and dev->enabled check with
is_devfn_enabled() call.

TEST=Able to build and boot without any regression seen on MTL.

Port of 'commit 50134eccbd ("soc/intel/alderlake: Make use
of is_devfn_enabled() function")'

Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Change-Id: I54bbd2bdba69a19e0559738035916fa7ac60faaa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Dinesh Gehlot 2022-12-20 09:31:21 +00:00 committed by Martin L Roth
parent d4f2d14d52
commit 14a0876de8
1 changed files with 2 additions and 3 deletions
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5
src/soc/intel/meteorlake/acpi.c
View File

@ -175,13 +175,12 @@ uint32_t soc_read_sci_irq_select(void)
static unsigned long soc_fill_dmar(unsigned long current) static unsigned long soc_fill_dmar(unsigned long current)
{ {
unsigned long tmp; unsigned long tmp;
const struct device *const igfx_dev = pcidev_path_on_root(PCI_DEVFN_IGD);
const uint64_t gfxvtbar = MCHBAR64(GFXVTBAR) & VTBAR_MASK; const uint64_t gfxvtbar = MCHBAR64(GFXVTBAR) & VTBAR_MASK;
const bool gfxvten = MCHBAR32(GFXVTBAR) & VTBAR_ENABLED; const bool gfxvten = MCHBAR32(GFXVTBAR) & VTBAR_ENABLED;
printk(BIOS_DEBUG, "%s - gfxvtbar:0x%llx 0x%x\n", printk(BIOS_DEBUG, "%s - gfxvtbar:0x%llx 0x%x\n",
__func__, gfxvtbar, MCHBAR32(GFXVTBAR)); __func__, gfxvtbar, MCHBAR32(GFXVTBAR));
if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { if (is_devfn_enabled(PCI_DEVFN_IGD) && gfxvtbar && gfxvten) {
tmp = current; tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_IGD, 0); current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_IGD, 0);
@ -201,7 +200,7 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_drhd_fixup(tmp, current); acpi_dmar_drhd_fixup(tmp, current);
/* Add RMRR entry */ /* Add RMRR entry */
if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { if (is_devfn_enabled(PCI_DEVFN_IGD) && gfxvtbar && gfxvten) {
tmp = current; tmp = current;
current += acpi_create_dmar_rmrr(current, 0, current += acpi_create_dmar_rmrr(current, 0,
sa_get_gsm_base(), sa_get_tolud_base() - 1); sa_get_gsm_base(), sa_get_tolud_base() - 1);