src: Remove unused 'include <cpu/x86/msr.h>'

Found using:
diff <(git grep -l '#include <cpu/x86/msr.h>' -- src/) <(git grep -l 'IA32_EFER\|EFER_\|TSC_MSR\|IA32_\|FEATURE_CONTROL_LOCK_BIT\|FEATURE_ENABLE_VMX\|SMRR_ENABLE\|CPUID_\|SGX_GLOBAL_ENABLE\|PLATFORM_INFO_SET_TDP\|SMBASE_RO_MSR\|MCG_CTL_P\|MCA_BANKS_MASK\|FAST_STRINGS_ENABLE_BIT\|SPEED_STEP_ENABLE_BIT\|ENERGY_POLICY_\|SMRR_PHYSMASK_\|MCA_STATUS_\|VMX_BASIC_HI_DUAL_MONITOR\|MC0_ADDR\|MC0_MISC\|MC0_CTL_MASK\|msr_struct\|msrinit_struct\|soc_msr_read\|soc_msr_write\|rdmsr\|wrmsr\|mca_valid\|mca_over\|mca_uc\|mca_en\|mca_miscv\|mca_addrv\|mca_pcc\|mca_idv\|mca_cecc\|mca_uecc\|mca_defd\|mca_poison\|mca_sublink\|mca_err_code\|mca_err_extcode\|MCA_ERRCODE_\|MCA_BANK_\|MCA_ERRTYPE_\|mca_err_type\|msr_set_bit\|msr_t\|msrinit_t' -- src/) |grep '<'

Change-Id: I45a41e77e5269969280e9f95cfc0effe7f117a40
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41969
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/cpu/intel/speedstep/acpi.c

@@ -5,7 +5,6 @@
 #include <acpi/acpi.h>
 #include <acpi/acpigen.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <cpu/intel/fsb.h>
 #include <cpu/intel/speedstep.h>
 #include <device/device.h>

src/cpu/x86/lapic/apic_timer.c

@@ -4,7 +4,6 @@
 #include <console/console.h>
 #include <delay.h>
 #include <thread.h>
-#include <cpu/x86/msr.h>
 #include <cpu/x86/lapic.h>
 
 void init_timer(void)

src/mainboard/intel/harcuvar/acpi_tables.c

@@ -3,7 +3,6 @@
 #include <acpi/acpi.h>
 #include <acpi/acpi_gnvs.h>
 #include <device/device.h>
-#include <cpu/x86/msr.h>
 
 #include <intelblocks/acpi.h>
 #include <soc/acpi.h>

src/mainboard/kontron/ktqm77/early_init.c

@@ -4,7 +4,6 @@
 #include <stdint.h>
 #include <device/pnp_ops.h>
 #include <device/pci_ops.h>
-#include <cpu/x86/msr.h>
 #include <device/pci_def.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <northbridge/intel/sandybridge/raminit.h>

src/mainboard/lenovo/x220/early_init.c

@@ -7,7 +7,6 @@
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
-#include <cpu/x86/msr.h>
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {

src/mainboard/scaleway/tagada/acpi_tables.c

@@ -3,7 +3,6 @@
 #include <acpi/acpi.h>
 #include <acpi/acpi_gnvs.h>
 #include <device/device.h>
-#include <cpu/x86/msr.h>
 
 #include <intelblocks/acpi.h>
 #include <soc/acpi.h>

src/northbridge/intel/e7505/raminit.c

@@ -20,7 +20,6 @@
 #include <lib.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>
-#include <cpu/x86/msr.h>
 #include <assert.h>
 #include <spd.h>
 #include <sdram_mode.h>

src/northbridge/intel/ironlake/northbridge.c

@@ -6,7 +6,6 @@
 #include <stdint.h>
 #include <delay.h>
 #include <cpu/intel/model_2065x/model_2065x.h>
-#include <cpu/x86/msr.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>

src/security/intel/stm/SmmStm.h

@@ -3,7 +3,6 @@
 #ifndef _SMM_STM_H_
 #define _SMM_STM_H_
 
-#include <cpu/x86/msr.h>
 #include "StmApi.h"
 
 /*

src/soc/amd/common/block/psp/psp.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <device/mmio.h>
-#include <cpu/x86/msr.h>
 #include <bootstate.h>
 #include <console/console.h>
 #include <amdblocks/psp.h>

src/soc/amd/picasso/romstage.c

@@ -3,7 +3,6 @@
 #include <arch/cpu.h>
 #include <acpi/acpi.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <console/uart.h>
 #include <cbmem.h>

src/soc/intel/apollolake/car.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <assert.h>
-#include <cpu/x86/msr.h>
 #include <intelblocks/msr.h>
 #include <program_loading.h>
 #include <soc/cpu.h>

src/soc/intel/apollolake/chip.c

@@ -5,7 +5,6 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <cpu/x86/mp.h>
-#include <cpu/x86/msr.h>
 #include <device/mmio.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/broadwell/cpu_info.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <soc/cpu.h>
 #include <soc/msr.h>
 #include <soc/systemagent.h>

src/soc/intel/common/block/acpi/acpi.c

@@ -9,7 +9,6 @@
 #include <acpi/acpi_gnvs.h>
 #include <console/console.h>
 #include <cpu/intel/turbo.h>
-#include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
 #include <intelblocks/acpi.h>
 #include <intelblocks/msr.h>

src/soc/intel/quark/include/soc/reg_access.h

@@ -4,7 +4,6 @@
 #define _QUARK_REG_ACCESS_H_
 
 #include <cpu/x86/cr.h>
-#include <cpu/x86/msr.h>
 #include <fsp/util.h>
 #include <reg_script.h>
 #include <soc/IntelQNCConfig.h>

src/soc/intel/xeon_sp/skx/soc_util.c

@@ -3,7 +3,6 @@
 #include <assert.h>
 #include <commonlib/sort.h>
 #include <console/console.h>
-#include <cpu/x86/msr.h>
 #include <delay.h>
 #include <device/pci.h>
 #include <hob_iiouds.h>

src/southbridge/amd/pi/hudson/early_setup.c

@@ -16,7 +16,6 @@
 
 #if CONFIG(HUDSON_UART)
 
-#include <cpu/x86/msr.h>
 #include <delay.h>
 
 void configure_hudson_uart(void)