haswell: Drop struct romstage_params type

It only contains a pointer to another struct. Flatten it.

Change-Id: Iab427592c332646e032a768719fc380c5794086b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43106
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
This commit is contained in:
Angel Pons 2020-07-03 14:22:20 +02:00
parent 6eea191511
commit 14c4f4f43c
14 changed files with 29 additions and 60 deletions

View file

@ -70,9 +70,5 @@ void mainboard_romstage_entry(void)
},
};
struct romstage_params romstage_params = {
.pei_data = &pei_data,
};
romstage_common(&romstage_params);
romstage_common(&pei_data);
}

View file

@ -70,9 +70,5 @@ void mainboard_romstage_entry(void)
},
};
struct romstage_params romstage_params = {
.pei_data = &pei_data,
};
romstage_common(&romstage_params);
romstage_common(&pei_data);
}

View file

@ -100,10 +100,6 @@ void mainboard_romstage_entry(void)
},
};
struct romstage_params romstage_params = {
.pei_data = &pei_data,
};
/* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params);
romstage_common(&pei_data);
}

View file

@ -73,12 +73,8 @@ void mainboard_romstage_entry(void)
.usb_xhci_on_resume = 1,
};
struct romstage_params romstage_params = {
.pei_data = &pei_data,
};
variant_romstage_entry(&romstage_params);
variant_romstage_entry(&pei_data);
/* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params);
romstage_common(&pei_data);
}

View file

@ -3,6 +3,6 @@
#ifndef VARIANT_H
#define VARIANT_H
void variant_romstage_entry(struct romstage_params *rp);
void variant_romstage_entry(struct pei_data *pei_data);
#endif

View file

@ -50,9 +50,9 @@ void copy_spd(struct pei_data *peid)
}
}
void variant_romstage_entry(struct romstage_params *rp)
void variant_romstage_entry(struct pei_data *pei_data)
{
rp->pei_data->ddr_refresh_2x = 1; /* Enable 2x refresh mode */
pei_data->ddr_refresh_2x = 1; /* Enable 2x refresh mode */
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
@ -82,6 +82,6 @@ void variant_romstage_entry(struct romstage_params *rp)
{ 0, USB_OC_PIN_SKIP }, /* P4; */
};
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
}

View file

@ -46,7 +46,7 @@ void copy_spd(struct pei_data *peid)
spd_file + (spd_index * spd_len), spd_len);
}
void variant_romstage_entry(struct romstage_params *rp)
void variant_romstage_entry(struct pei_data *pei_data)
{
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
@ -76,6 +76,6 @@ void variant_romstage_entry(struct romstage_params *rp)
{ 0, USB_OC_PIN_SKIP }, /* P4; */
};
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
}

View file

@ -63,7 +63,7 @@ void copy_spd(struct pei_data *peid)
}
}
void variant_romstage_entry(struct romstage_params *rp)
void variant_romstage_entry(struct pei_data *pei_data)
{
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
@ -93,6 +93,6 @@ void variant_romstage_entry(struct romstage_params *rp)
{ 0, USB_OC_PIN_SKIP }, /* P4; */
};
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
}

View file

@ -50,7 +50,7 @@ void copy_spd(struct pei_data *peid)
}
}
void variant_romstage_entry(struct romstage_params *rp)
void variant_romstage_entry(struct pei_data *pei_data)
{
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
@ -80,6 +80,6 @@ void variant_romstage_entry(struct romstage_params *rp)
{ 0, USB_OC_PIN_SKIP }, /* P4; */
};
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
}

View file

@ -112,10 +112,6 @@ void mainboard_romstage_entry(void)
},
};
struct romstage_params romstage_params = {
.pei_data = &pei_data,
};
/* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params);
romstage_common(&pei_data);
}

View file

@ -92,9 +92,5 @@ void mainboard_romstage_entry(void)
},
};
struct romstage_params romstage_params = {
.pei_data = &pei_data,
};
romstage_common(&romstage_params);
romstage_common(&pei_data);
}

View file

@ -68,9 +68,5 @@ void mainboard_romstage_entry(void)
},
};
struct romstage_params romstage_params = {
.pei_data = &pei_data,
};
romstage_common(&romstage_params);
romstage_common(&pei_data);
}

View file

@ -190,10 +190,7 @@
void intel_northbridge_haswell_finalize_smm(void);
struct pei_data;
struct romstage_params {
struct pei_data *pei_data;
};
void romstage_common(const struct romstage_params *params);
void romstage_common(struct pei_data *pei_data);
void mb_late_romstage_setup(void); /* optional */
void haswell_early_initialization(void);

View file

@ -22,7 +22,7 @@ void __weak mb_late_romstage_setup(void)
{
}
void romstage_common(const struct romstage_params *params)
void romstage_common(struct pei_data *pei_data)
{
int wake_from_s3;
@ -52,15 +52,15 @@ void romstage_common(const struct romstage_params *params)
post_code(0x3a);
/* MRC has hardcoded assumptions of 2 meaning S3 wake. Normalize it here. */
params->pei_data->boot_mode = wake_from_s3 ? 2 : 0;
pei_data->boot_mode = wake_from_s3 ? 2 : 0;
timestamp_add_now(TS_BEFORE_INITRAM);
report_platform_info();
copy_spd(params->pei_data);
copy_spd(pei_data);
sdram_initialize(params->pei_data);
sdram_initialize(pei_data);
timestamp_add_now(TS_AFTER_INITRAM);
@ -71,7 +71,7 @@ void romstage_common(const struct romstage_params *params)
if (!wake_from_s3) {
cbmem_initialize_empty();
/* Save data returned from MRC on non-S3 resumes. */
save_mrc_data(params->pei_data);
save_mrc_data(pei_data);
} else if (cbmem_initialize()) {
#if CONFIG(HAVE_ACPI_RESUME)
/* Failed S3 resume, reset to come up cleanly */
@ -81,7 +81,7 @@ void romstage_common(const struct romstage_params *params)
haswell_unhide_peg();
setup_sdram_meminfo(params->pei_data);
setup_sdram_meminfo(pei_data);
romstage_handoff_init(wake_from_s3);