intel/common/block/i2c: Fix clock programming of i2c

When configuring i2c frequency to I2C_SPEED_FAST_PLUS, observed frequency
was I2C_SPEED_FAST.

This was due to incorrect register programming.

TEST= Build for Soraka, I2C frequency during firmware execution was
I2C_SPEED_FAST_PLUS when configured for I2C_SPEED_FAST_PLUS.

Change-Id: Ib0e08afe0e1b6d8c9961d5e3039b07ada9d30aa3
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/20646
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Naresh G Solanki 2017-07-19 17:14:33 +05:30 committed by Duncan Laurie
parent 05a2b1aacd
commit 14deaeec61
1 changed files with 6 additions and 6 deletions

View File

@ -407,12 +407,12 @@ static int lpss_i2c_set_speed_config(unsigned int bus,
if (!config->scl_lcnt && !config->scl_hcnt && !config->sda_hold)
return 0;
if (config->speed >= I2C_SPEED_FAST_PLUS) {
/* Fast-Plus and High speed */
if (config->speed >= I2C_SPEED_HIGH) {
/* High and Fast Ultra speed */
hcnt_reg = &regs->hs_scl_hcnt;
lcnt_reg = &regs->hs_scl_lcnt;
} else if (config->speed >= I2C_SPEED_FAST) {
/* Fast speed */
/* Fast and Fast-Plus speed */
hcnt_reg = &regs->fs_scl_hcnt;
lcnt_reg = &regs->fs_scl_lcnt;
} else {
@ -590,11 +590,11 @@ static int lpss_i2c_set_speed(unsigned int bus, enum i2c_speed speed,
control = read32(&regs->control);
control &= ~CONTROL_SPEED_MASK;
if (speed >= I2C_SPEED_FAST_PLUS) {
/* High and Fast-Plus speed share config registers */
if (speed >= I2C_SPEED_HIGH) {
/* High and Fast-Ultra speed share config registers */
control |= CONTROL_SPEED_HS;
} else if (speed >= I2C_SPEED_FAST) {
/* Fast speed */
/* Fast speed and Fast-Plus */
control |= CONTROL_SPEED_FS;
} else {
/* Standard speed */