mb/google/rex/var/rex: Configure cpu power limits by battery status

When battery level is below critical level or battery is not present,
cpus need to run with a power optimized configuration to avoid platform
instabilities. This will check the current battery status and configure
cpu power limits properly.

BUG=b:296952944
TEST=Build rex0 and check cpu power limits are configured with
a performance efficient configuration and the platform boots to OS if
battery level is above the critical level. And check cpu power limits
are configured with a power optimized configuration and boots to OS
without an issue if battery is not present or battery level is at or
below critical level.

Change-Id: I12fd40abda76c8e7522b06a5aee72665f32ddec8
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78322
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jamie Ryu 2023-10-11 20:16:38 -07:00 committed by Subrata Banik
parent 19080a71c8
commit 15010cd81f
1 changed files with 30 additions and 3 deletions

View File

@ -2,6 +2,7 @@
#include <baseboard/variants.h> #include <baseboard/variants.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <ec/google/chromeec/ec.h>
#include <intelblocks/power_limit.h> #include <intelblocks/power_limit.h>
/* /*
@ -9,7 +10,7 @@
* pl2_min (milliWatts), pl2_max (milliWatts), pl4 (milliWatts) * pl2_min (milliWatts), pl2_max (milliWatts), pl4 (milliWatts)
* Following values are for performance config as per document #640982 * Following values are for performance config as per document #640982
*/ */
const struct cpu_tdp_power_limits limits[] = { const struct cpu_tdp_power_limits performance_efficient_limits[] = {
{ {
.mch_id = PCI_DID_INTEL_MTL_P_ID_2, .mch_id = PCI_DID_INTEL_MTL_P_ID_2,
.cpu_tdp = 15, .cpu_tdp = 15,
@ -21,8 +22,34 @@ const struct cpu_tdp_power_limits limits[] = {
}, },
}; };
const struct cpu_tdp_power_limits power_optimized_limits[] = {
{
.mch_id = PCI_DID_INTEL_MTL_P_ID_2,
.cpu_tdp = 15,
.pl1_min_power = 10000,
.pl1_max_power = 15000,
.pl2_min_power = 57000,
.pl2_max_power = 57000,
.pl4_power = 64000
},
};
void variant_devtree_update(void) void variant_devtree_update(void)
{ {
size_t total_entries = ARRAY_SIZE(limits); const struct cpu_tdp_power_limits *limits = performance_efficient_limits;
variant_update_cpu_power_limits(limits, total_entries); size_t limits_size = ARRAY_SIZE(performance_efficient_limits);
/*
* If battery is not present or battery level is at or below critical threshold
* to boot a platform with the performance efficient configuration, boot with
* the power optimized configuration.
*/
if (CONFIG(EC_GOOGLE_CHROMEEC)) {
if (!google_chromeec_is_battery_present_and_above_critical_threshold()) {
limits = power_optimized_limits;
limits_size = ARRAY_SIZE(power_optimized_limits);
}
}
variant_update_cpu_power_limits(limits, limits_size);
} }