timestamp: Drop duplicate TS_END_ROMSTAGE entries

This entry gets added in run_ramstage().

Change-Id: I18cda4ead3614c6d07c3269cbee53e6def6408c7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15755
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Kyösti Mälkki 2016-07-20 07:20:50 +03:00
parent a877b74a79
commit 150f476c96
3 changed files with 0 additions and 6 deletions

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@ -588,8 +588,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0); pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0);
pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0); pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0);
timestamp_add_now(TS_END_ROMSTAGE);
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x43); // Should never see this post code. post_code(0x43); // Should never see this post code.
} }

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@ -629,8 +629,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0); pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0);
pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0); pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0);
timestamp_add_now(TS_END_ROMSTAGE);
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x43); // Should never see this post code. post_code(0x43); // Should never see this post code.
} }

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@ -212,8 +212,6 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) {
*(uint32_t*)cbmem_hob_ptr = (uint32_t)HobListPtr; *(uint32_t*)cbmem_hob_ptr = (uint32_t)HobListPtr;
post_code(0x4f); post_code(0x4f);
timestamp_add_now(TS_END_ROMSTAGE);
run_ramstage(); run_ramstage();
} }