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soc/intel/apollolake: Make use of Intel SPI common block 

TEST=Build and boot reef

Change-Id: I1bb22ef1737b9e35892294ec0d66df39c546d72e
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Subrata Banik 2017-11-07 17:50:48 +05:30 committed by Aaron Durbin
parent c0ec28642f
commit 15129b4db4
3 changed files with 3 additions and 11 deletions
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1
src/soc/intel/apollolake/Kconfig
View File

@ -86,6 +86,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_XDCI select SOC_INTEL_COMMON_BLOCK_XDCI
select SOC_INTEL_COMMON_BLOCK_XHCI select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_SPI_FLASH_PROTECT select SOC_INTEL_COMMON_SPI_FLASH_PROTECT
select UDELAY_TSC select UDELAY_TSC
select TSC_CONSTANT_RATE select TSC_CONSTANT_RATE

3
src/soc/intel/apollolake/Makefile.inc
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@ -57,13 +57,12 @@ ramstage-y += memmap.c
ramstage-y += mmap_boot.c ramstage-y += mmap_boot.c
ramstage-y += uart.c ramstage-y += uart.c
ramstage-y += nhlt.c ramstage-y += nhlt.c
ramstage-y += systemagent.c
ramstage-y += spi.c ramstage-y += spi.c
ramstage-y += systemagent.c
ramstage-y += pmutil.c ramstage-y += pmutil.c
ramstage-y += pmc.c ramstage-y += pmc.c
ramstage-y += reset.c ramstage-y += reset.c
ramstage-y += sram.c ramstage-y += sram.c
ramstage-y += spi.c
ramstage-y += xdci.c ramstage-y += xdci.c
ramstage-y += sd.c ramstage-y += sd.c

10
src/soc/intel/apollolake/spi.c
View File

@ -2,6 +2,7 @@
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright 2016 Google Inc. * Copyright 2016 Google Inc.
* Copyright 2017 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -14,11 +15,8 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <console/console.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/spi.h> #include <intelblocks/spi.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <spi-generic.h>
int spi_soc_devfn_to_bus(unsigned int devfn) int spi_soc_devfn_to_bus(unsigned int devfn)
{ {
@ -45,9 +43,3 @@ int spi_soc_bus_to_devfn(unsigned int bus)
} }
return -1; return -1;
} }
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
{ .ctrlr = &fast_spi_flash_ctrlr, .bus_start = 0, .bus_end = 0 },
};
const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);