mb/google/volteer: Enable HECI interface
This is to enable Intel ME communication interface HECI1 by devicetree for PAVP with CSE Lite. BUG=b:159615125 TEST=Build and boot volteer. Run lspci and check pcie device 00:16.0 Communication controller: Intel Corporation Device a0e0 Change-Id: I68eb51c6a0af77982c060767993265764a2bc926 Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42308 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
parent
bc6aa222a6
commit
154625bcb2
|
@ -43,6 +43,9 @@ chip soc/intel/tigerlake
|
|||
register "pmc_gpe0_dw1" = "GPP_D"
|
||||
register "pmc_gpe0_dw2" = "GPP_E"
|
||||
|
||||
# Enable heci communication
|
||||
register "HeciEnabled" = "1"
|
||||
|
||||
# FSP configuration
|
||||
register "SaGv" = "SaGv_Disabled"
|
||||
register "SmbusEnable" = "0"
|
||||
|
|
Loading…
Reference in New Issue