drivers/net/phy/m88e1512: Add interrupt enable
INTn on Marvell PHY can be routed to LED[2] pin. This setting must be made via LED Timer Control Register on page 3. Change-Id: Ida1efbb604c382676b9d13ac8bf14de768f93637 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69433 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -7,4 +7,5 @@ struct drivers_net_phy_m88e1512_config {
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unsigned char led_0_ctrl; /* LED[0] Control */
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unsigned char led_1_ctrl; /* LED[1] Control */
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unsigned char led_2_ctrl; /* LED[2] Control */
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bool enable_int; /* INTn can be routed to LED[2] pin */
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};
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@ -34,6 +34,22 @@ static void m88e1512_init(struct device *dev)
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/* Switch back to page 0. */
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switch_page(dev, 0);
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}
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/* INTn can be routed to LED[2] pin. */
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if (config->enable_int) {
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printk(BIOS_DEBUG, "%s: INTn is routed to LED[2] pin %s.\n",
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dev_path(dev->bus->dev), dev->chip_ops->name);
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/* Select page 3 to access LED function control register. */
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switch_page(dev, 3);
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reg = mdio_read(dev, LED_TIMER_CTRL_REG);
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setbits16(®, LED_IRQ_ENABLE);
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mdio_write(dev, LED_TIMER_CTRL_REG, reg);
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/* Switch back to page 0. */
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switch_page(dev, 0);
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}
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}
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struct device_operations m88e1512_ops = {
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@ -7,5 +7,7 @@
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#define PAGE_REG 0x16
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#define LED_FUNC_CTRL_REG 0x10
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#define LED_FUNC_CTRL_MASK 0x0FFF
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#define LED_TIMER_CTRL_REG 0x12
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#define LED_IRQ_ENABLE (1 << 7)
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#endif /* _PHY_M88E1512_H_ */
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