soc/amd/common/block/lpc/lpc: simplify index handling in read resources
Now that we don't need to find a specific resource in the set resources function any more, there's no need to use hard-coded indices for the fixed resources. Instead use an index variable that gets incremented after each fixed resource got added. The index now starts at 0 instead of at 1, but now the only requirement is that those indices are unique. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ida5f1f001c622da2e31474b62832782f5f303a32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74849 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -106,6 +106,7 @@ static void lpc_init(struct device *dev)
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static void lpc_read_resources(struct device *dev)
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{
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struct resource *res;
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unsigned long idx = 0;
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/* Get the normal pci resources of this device */
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pci_dev_read_resources(dev);
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@ -118,20 +119,20 @@ static void lpc_read_resources(struct device *dev)
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IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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/* Only up to 16 MByte of the SPI flash can be mapped right below 4 GB */
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mmio_range(dev, 1, FLASH_BELOW_4GB_MAPPING_REGION_BASE,
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mmio_range(dev, idx++, FLASH_BELOW_4GB_MAPPING_REGION_BASE,
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FLASH_BELOW_4GB_MAPPING_REGION_SIZE);
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/* Add a memory resource for the SPI BAR. */
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mmio_range(dev, 2, SPI_BASE_ADDRESS, 4 * KiB);
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mmio_range(dev, idx++, SPI_BASE_ADDRESS, 4 * KiB);
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/* Add a memory resource for the eSPI MMIO */
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mmio_range(dev, 3, SPI_BASE_ADDRESS + ESPI_OFFSET_FROM_BAR, 4 * KiB);
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mmio_range(dev, idx++, SPI_BASE_ADDRESS + ESPI_OFFSET_FROM_BAR, 4 * KiB);
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/* FCH IOAPIC */
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mmio_range(dev, 4, IO_APIC_ADDR, 4 * KiB);
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mmio_range(dev, idx++, IO_APIC_ADDR, 4 * KiB);
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/* HPET */
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mmio_range(dev, 5, HPET_BASE_ADDRESS, 4 * KiB);
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mmio_range(dev, idx++, HPET_BASE_ADDRESS, 4 * KiB);
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compact_resources(dev);
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}
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