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soc/intel/skylake: Remove TCO lock down programming 

FSP is doing TCO lock inside Post PCI bus enumeration
NotifyPhase(). Hence remove TCO Lock down programming
from coreboot.

TEST= Ensure TCO_LOCK offset 8 bit 12 is set.

Change-Id: Iec9e3075df01862f8558b303a458126c68202bff
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/21031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Subrata Banik 2017-08-16 18:58:21 +05:30 committed by Aaron Durbin
parent 4f6e341e88
commit 15943df29c
1 changed files with 0 additions and 8 deletions
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8
src/soc/intel/skylake/finalize.c
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@ -107,8 +107,6 @@ static void pch_finalize_script(void)
{
device_t dev;
uint32_t reg32;
u16 tcobase;
u16 tcocnt;
uint8_t *pmcbase;
config_t *config;
u8 reg8;
@ -119,12 +117,6 @@ static void pch_finalize_script(void)
/* Lock FAST_SPIBAR */
fast_spi_lock_bar();
/* TCO Lock down */
tcobase = smbus_tco_regs();
tcocnt = inw(tcobase + TCO1_CNT);
tcocnt |= TCO_LOCK;
outw(tcocnt, tcobase + TCO1_CNT);
/* Display me status before we hide it */
intel_me_status();