soc/intel/skylake: Remove TCO lock down programming
FSP is doing TCO lock inside Post PCI bus enumeration NotifyPhase(). Hence remove TCO Lock down programming from coreboot. TEST= Ensure TCO_LOCK offset 8 bit 12 is set. Change-Id: Iec9e3075df01862f8558b303a458126c68202bff Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -107,8 +107,6 @@ static void pch_finalize_script(void)
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{
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{
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device_t dev;
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device_t dev;
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uint32_t reg32;
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uint32_t reg32;
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u16 tcobase;
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u16 tcocnt;
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uint8_t *pmcbase;
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uint8_t *pmcbase;
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config_t *config;
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config_t *config;
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u8 reg8;
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u8 reg8;
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@ -119,12 +117,6 @@ static void pch_finalize_script(void)
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/* Lock FAST_SPIBAR */
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/* Lock FAST_SPIBAR */
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fast_spi_lock_bar();
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fast_spi_lock_bar();
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/* TCO Lock down */
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tcobase = smbus_tco_regs();
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tcocnt = inw(tcobase + TCO1_CNT);
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tcocnt |= TCO_LOCK;
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outw(tcocnt, tcobase + TCO1_CNT);
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/* Display me status before we hide it */
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/* Display me status before we hide it */
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intel_me_status();
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intel_me_status();
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