diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
index a493be1469..f25817a2c3 100644
--- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb
+++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
@@ -328,24 +328,14 @@ chip soc/intel/alderlake
 						register "desc" = ""USB3 Type-C Port C1 (DB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(1, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
 						device ref tcss_usb3_port2 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB3 Type-C Port C2 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(2, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
 						device ref tcss_usb3_port3 on end
 					end
 				end
@@ -358,24 +348,14 @@ chip soc/intel/alderlake
 						register "desc" = ""USB2 Type-C Port C1 (DB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(1, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
 						device ref usb2_port2 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB2 Type-C Port C2 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(2, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
 						device ref usb2_port3 on end
 					end
 					chip drivers/usb/acpi
@@ -387,12 +367,7 @@ chip soc/intel/alderlake
 						register "desc" = ""USB2 Type-A Port A0 (DB)""
 						register "type" = "UPC_TYPE_A"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
-							.group = ACPI_PLD_GROUP(1, 2)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
 						device ref usb2_port9 on end
 					end
 					chip drivers/usb/acpi
@@ -406,12 +381,7 @@ chip soc/intel/alderlake
 						register "desc" = ""USB3 Type-A Port A0 (DB)""
 						register "type" = "UPC_TYPE_USB3_A"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
-							.group = ACPI_PLD_GROUP(1, 2)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
 						device ref usb3_port1 on end
 					end
 				end