superiotool: Add support for chip NCT6102D / NCT6106D

Add support for chip NCT6102D / NCT6106D in superiotool

Change-Id: I689ff8e796f43a5aac144e9898df750407588b1f
Signed-off-by: Roberto Muñoz Gómez <munoz.roberto@gmail.com>
Reviewed-on: https://review.coreboot.org/14206
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
This commit is contained in:
Roberto Muñoz Gómez 2016-03-31 17:03:53 +02:00 committed by Stefan Reinauer
parent b2b425b05b
commit 15a53c6329
1 changed files with 68 additions and 0 deletions

View File

@ -464,6 +464,74 @@ static const struct superio_registers reg_table[] = {
{0x30,0xe0,0xe1,0xe2,EOT}, {0x30,0xe0,0xe1,0xe2,EOT},
{0x20,0x20,0x04,0x05,EOT}}, {0x20,0x20,0x04,0x05,EOT}},
{EOT}}}, {EOT}}},
{0xc452, "NCT6102D / NCT6106D", {
{NOLDN, NULL,
{0x07,0x10,0x11,0x13,0x14,0x1a,0x1b,0x20,0x21,0x22,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2f,EOT},
{0x00,0xff,0xff,0x00,0x00,0xcc,0x03,0x10,0x61,0x7F,0x00,0x00,MISC,0x00,0x00,0xf0,0x00,MISC,EOT}},
{0x00, "FDC",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,EOT}},
{0x01, "PRT",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
{0x02, "UART A",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
{0x01,0x03,0xf8,0x04,0x00,0x00,0x00,0xff,0xff,0x02,0x00,0x00,EOT}},
{0x03, "UART B",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x00,0x00,0xff,0xff,0x02,0x00,0x00,EOT}},
{0x05, "Keyboard Controller (KBC)",
{0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x83,EOT}},
{0x06, "CIR",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
{0x00,0x00,0x00,0x00,0x08,0x09,0x32,0x00,EOT}},
{0x07, "GPIO",
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT},
{0xdf,0xff,0x00,0x00,0x00,0xef,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0xff,0xff,0x00,0x00,0xff,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x02,0x00,0x00,0x00,EOT}},
{0x08, "GPIO,WDT1",
{0x30,0x60,0x61,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xf0,0xf1,0xf2,EOT},
{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,EOT}},
{0x09, "GPIO",
{0xe0,0xe1,0xe2,EOT},
{0x00,0x00,0x00,EOT}},
{0x0a, "ACPI",
{0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,EOT},
{0x01,0x00,0x00,0x00,0x00,0x02,0x1c,0x00,0x80,0x00,0x40,0x00,0x00,0x00,0x00,0xc0,0x00,0x00,EOT}},
{0x0b, "Hardware Monitor, Front Panel LED",
{0x30,0x60,0x61,0x62,0x63,0x70,0xe0,0xe1,0xe2,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x7f,0x7f,0xff,0x00,0x00,0x00,0x00,0x00,0x87,0x47,0x00,EOT}},
{0x0d, "WDT2",
{0xe0,0xe1,0xe2,0xe3,0xe4,EOT},
{0x00,0x32,0x14,0x00,0x00,EOT}},
{0x0e, "CIR WAKE-UP",
{0x30,0x60,0x61,0x70,0xe0,0xe1,EOT},
{0x00,0x00,0x00,0x00,0x25,0x00,EOT}},
{0x0f, "GPIO Push-Pull or Open-drain",
{0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xf0,0xf1,0xf2,EOT},
{0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x03,0x9d,0x00,0x00,EOT}},
{0x10, "UARTC",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
{0x00,0x03,0x00,0x04,0x00,0x00,0x00,0xff,0xff,0x02,0x00,0x00,EOT}},
{0x11, "UARTD",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
{0x00,0x02,0x00,0x03,0x00,0x00,0x00,0xff,0xff,0x02,0x00,0x00,EOT}},
{0x12, "UARTE",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
{0x00,0x03,0xe8,0x04,0x00,0x00,0x00,0xff,0xff,0x02,0x00,0x00,EOT}},
{0x13, "UARTF",
{0x30,0x60,0x61,0x70,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
{0x00,0x02,0xe8,0x03,0x00,0x00,0x00,0xff,0xff,0x02,0x00,0x00,EOT}},
{0x14, "PORT80 IR",
{0x30,0x60,0x61,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x10,0x00,0x00,0x00,EOT}},
{0x15, "FADING LED",
{0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,0xe9,EOT},
{0x00,0x3f,0x01,0x11,0x11,0x02,0x00,0x00,0x01,0x00,EOT}},
{0x16, "Deep Sleep",
{0x30,0xe0,0xe1,0xe2,EOT},
{0x20,0x20,0x04,0x05,EOT}},
{EOT}}},
{EOT} {EOT}
}; };