AMD Mainboards - platform_cfg.h: Fixes for doxygen

- Move @def BIOS_SIZE description to the next line
- SB_GEN2 changed to SB_GPP_GEN2
- Move the SIO_HWM_BASE_ADDRESS description to the next line

Change-Id: Ia3496b0108484f557627304553461932a100dfa5
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8071
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Martin Roth 2014-12-29 22:08:15 -07:00 committed by Martin Roth
parent 182e551f2d
commit 15b6325cd4
13 changed files with 46 additions and 29 deletions

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
* @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
* @def SIO_HWM_BASE_ADDRESS
* Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/

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@ -25,7 +25,8 @@
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In Hudson-2, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
* @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
* @def SIO_HWM_BASE_ADDRESS
* Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
* @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
* @def SIO_HWM_BASE_ADDRESS
* Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
* @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
* @def SIO_HWM_BASE_ADDRESS
* Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290

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@ -26,7 +26,8 @@
#define LEGACY_FREE 1
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -195,7 +196,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/

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@ -23,7 +23,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -192,7 +193,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -190,7 +191,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/

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@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
* @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
* @def BIOS_SIZE
* BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@ -190,7 +191,7 @@
#define NB_SB_GEN2 TRUE
/**
* @def SB_GEN2
* @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/