diff --git a/src/soc/intel/skylake/include/soc/romstage.h b/src/soc/intel/skylake/include/soc/romstage.h
index f030301bdb..d1c846b045 100644
--- a/src/soc/intel/skylake/include/soc/romstage.h
+++ b/src/soc/intel/skylake/include/soc/romstage.h
@@ -33,7 +33,6 @@ void intel_early_me_status(void);
 void enable_smbus(void);
 int smbus_read_byte(unsigned device, unsigned address);
 
-int early_spi_read(u32 offset, u32 size, u8 *buffer);
 int early_spi_read_wpsr(u8 *sr);
 void mainboard_fill_spd_data(struct pei_data *pei_data);
 
diff --git a/src/soc/intel/skylake/romstage/spi.c b/src/soc/intel/skylake/romstage/spi.c
index 2194d21f58..41a144b165 100644
--- a/src/soc/intel/skylake/romstage/spi.c
+++ b/src/soc/intel/skylake/romstage/spi.c
@@ -21,26 +21,6 @@
 #include <soc/flash_controller.h>
 #include <soc/romstage.h>
 
-int early_spi_read(u32 offset, u32 size, u8 *buffer)
-{
-	u32 current = 0;
-
-	spi_init();
-	while (size > 0) {
-		u8 count = (size < 64) ? size : 64;
-		/* sending NULL for spiflash struct parameter since we are not
-		 * calling HWSEQ read() call via Probe.
-		 */
-		if (pch_hwseq_read(NULL, offset + current, count,
-				   buffer + current) != 0)
-			return -1;
-		size -= count;
-		current += count;
-	}
-
-	return 0;
-}
-
 /*
  * Minimal set of commands to read WPSR from SPI.
  * Returns 0 on success, < 0 on failure.