diff --git a/src/southbridge/intel/lynxpoint/gpio.c b/src/southbridge/intel/lynxpoint/gpio.c
index b492068ccd..147a1c013b 100644
--- a/src/southbridge/intel/lynxpoint/gpio.c
+++ b/src/southbridge/intel/lynxpoint/gpio.c
@@ -109,3 +109,22 @@ unsigned get_gpios(const int *gpio_num_array)
 	}
 	return vector;
 }
+
+void set_gpio(int gpio_num, int value)
+{
+	static const int gpio_reg_offsets[] = {0xc, 0x38, 0x48};
+	u16 gpio_base = get_gpio_base();
+	int index, bit;
+	u32 config;
+
+	if (gpio_num > MAX_GPIO_NUMBER)
+		return; /* Just ignore wrong gpio numbers. */
+
+	index = gpio_num / 32;
+	bit = gpio_num % 32;
+
+	config = inl(gpio_base + gpio_reg_offsets[index]);
+	config &= ~(1 << bit);
+	config |= value << bit;
+	outl(config, gpio_base + gpio_reg_offsets[index]);
+}
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c
index d64555e668..b90e5ba4b8 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.c
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.c
@@ -107,3 +107,17 @@ unsigned get_gpios(const int *gpio_num_array)
 	}
 	return vector;
 }
+
+void set_gpio(int gpio_num, int value)
+{
+	u16 gpio_base = get_gpio_base();
+	u32 conf0;
+
+	if (gpio_num > MAX_GPIO_NUMBER)
+		return;
+
+	conf0 = inl(gpio_base + GPIO_CONFIG0(gpio_num));
+	conf0 &= ~GPO_LEVEL_MASK;
+	conf0 |= value << GPO_LEVEL_SHIFT;
+	outl(conf0, gpio_base + GPIO_CONFIG0(gpio_num));
+}
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index c04957308f..4bdb9268e9 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -193,6 +193,10 @@ int get_gpio(int gpio_num);
  * the array of gpio pin numbers to scan, terminated by -1.
  */
 unsigned get_gpios(const int *gpio_num_array);
+/*
+ * set GPIO pin value
+ */
+void set_gpio(int gpio_num, int value);
 #endif
 
 #define MAINBOARD_POWER_OFF	0